Senior FPGA Engineer

Astranis Space Technologies; San Francisco (CA); On-site; USD 170,000 - 235,000; Full time

Job summary

Astranis Space Technologies is seeking a Senior FPGA Engineer to design and verify RTL for spacecraft FPGAs. The role involves collaboration with software and hardware teams, and offers a competitive salary and benefits package, including equity and flexible PTO.

Benefits

Equity in the form of incentive stock options

Company-subsidized healthcare

Flexible PTO

401(K) retirement plan

Free on-site catered meals

Qualifications

• 5+ years of experience in hardware development.
• Experience with high throughput systems on FPGAs.
• Familiarity with power, thermal, and real estate implications.

Responsibilities

• Design RTL for high data rate, software defined radios.
• Collaborate with DSP/radio algorithm designers.
• Assist in recruiting and hiring additional teammates.

Skills

Verilog/SystemVerilog

Hardware development

FPGA design

C/C++ modeling

Digital communication theory

Education

Bachelor of Science in Electrical Engineering

Tools

Vivado IDE

Xilinx Ultrascale

Job description

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As a team, we’ve launched five satellites into orbit, signed ten commercial deals worth over $1 billion in revenue, raised over $750 million from top global investors, and recruited a team of over 400 world-class engineers. We all work out of our (legendary) San Francisco office, which was once used to build ships during the World Wars.

Our satellites, which operate from geostationary orbit (GEO), weigh only 400 kg and utilize a proprietary software-defined radio payload. Each satellite can connect over two million people, and we’re very excited for the impact we’ll soon have in the Philippines, Peru, Mexico, and more!

Backed by substantial funding and a passionate, collaborative team, we offer a rewarding work environment where you'll learn and make a significant impact, no matter where you are in your career.

Senior FPGA Engineer

As a Senior FPGA Engineer you'll be responsible for the architecture, the design, the verification, and test of RTL designs for the FPGAs that go into the spacecraft and on the ground station. You will work closely with the software, DSP and hardware teams to achieve design requirements.

Role:

• Design RTL for high data rate, software defined radios
• Work with multiple FPGAs and toolchains
• Interface FPGAs with high speed data converters, memories, MCUs
• Design, implement and test radiation mitigation schemes on FPGA
• Collaborate closely with DSP/radio algorithm designers
• Collaborate closely with embedded firmware and software engineers
• Assist in recruiting, interviewing, and hiring additional teammates to our rapidly-growing team.
  
  
  

Requirements:

• Bachelor of Science degree in electrical engineering, computer science, computer engineering, or equivalent
• 5+ years of experience
• A passion for hardware development, including working in a fast-paced environment and hands-on design and development
• Experience in designing, implementing, and testing high throughput systems implemented on FPGAs
• Familiarity with system level estimates and implications of power, thermal, and real estate
• Strong proficiency with Verilog/SystemVerilog for both synthesis and verification
• Writing test benches and FPGA verification at module level and at top/system level
• Experience with C/C++ bit accurate modeling of RTL modules.
  
  
  

Bonus:

• MS or PhD in computer engineering or equivalent
• Considerable expertise in at least 1 domain beyond just the logic design. This could be DSP/radio design, software, encryption, FEC encoding/decoding.
• Experience with Xilinx Ultrascale/Ultrascale+/Versal FPGA’s
• Experience with Vivado IDE, TCL
• Experience with high speed data converters (ADCs, DACs, JESD204)
• Experience with UVM and DPI simulation methodologies
• Experience with circuit level debugging
• Experience with digital communication theory and implementation, DVB-S2X modulation/demodulation, FEC encoding/decoding as LDPC, Turbo, Reed-Solomon, Channelization, FIR/IIR filtering, I/Q signaling.
• Experience with space-based systems, Radiation tolerant design, such as TMR and ECC
• Experience with a scripting language like Python or Perl or Tcl
  
  
  

What we offer:

All our positions offer a compensation package that includes equity and robust benefits.

Base pay is a single component of Astranis's total rewards package, which may also include equity in the form of incentive stock options, high quality company-subsidized healthcare, disability and life insurance benefits, flexible PTO, 401(K) retirement, and free on-site catered meals.

Astranis pay ranges are informed and defined through professional-grade salary surveys and compensation data sources. The actual base salary offered to a successful candidate will additionally be influenced by a variety of factors including experience, credentials & certifications, educational attainment, skill level requirements, and the level and scope of the position.

Base Salary

$170,000—$235,000 USD

U.S. Citizenship, Lawful Permanent Residency, Or Refugee/Asylee Status Required

(To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States, or other protected individual as defined by 8 U.S.C. 1324b(a)(3))

Our mission and our products are meant to connect the world and everyone in it, regardless of gender, race, creed, or any other distinction. We believe in a diverse and inclusive workplace, and we encourage all people to join our team and bring their unique perspective to help make us stronger.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  Space Research and Technology

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