Senior FPGA Design Lead: Drive Innovative Solutions

Keysight Technologies; Austin (TX); On-site; USD 139,000 - 231,600; Full time

Benefits offered by this job

Medical, dental and vision

401(k) Plan

Flexible Time Off

Tuition Reimbursement

ESPP

Job summary

Keysight Technologies in Austin, TX is seeking an experienced FPGA engineer to design, develop, and lead next‑gen hardware platforms. You will guide FPGA architecture, collaborate with cross‑functional teams, and deliver robust, scalable solutions.

Requirements include a B.Sc or M.Sc in EE or CE and 8+ years in FPGA design; strong VHDL/SystemVerilog skills; SerDes up to 224Gbps, DDR5, PCIe knowledge; and excellent communication abilities.

Qualifications

• B.Sc or M.Sc in EE or CE from an accredited university.
• 8+ years experience in the FPGA industry.
• Candidates with more/less experience will be considered for junior / senior roles.
• Strong analytical skills. Excellent written, verbal, presentation communication skills.
• Able to cultivate interpersonal relationships and cohesive team interactions and communications.
• Assertive self‑starter with excellent organizational skills. Positive, can‑do approach.

Responsibilities

• Understanding business and technical needs to design, develop, and implement new features and platforms.
• Creating and developing innovative new products and features.
• Technical leadership of FPGA designs.
• Providing guidance to junior engineers.
• Pro‑active participation in project kick‑off, reviews, status reports, and issue resolution with proposed solutions.
• Driving continuous process and code base improvements.

Skills

Analytical skills

Verbal and written communication

Interpersonal relationships

Self-starter

Team leadership

Education

B.Sc or M.Sc in EE or CE

Tools

VHDL

SystemVerilog

Tcl

Perl

Python

Job description

Keysight Technologies in Austin, TX is seeking an experienced FPGA engineer to design, develop, and lead next‑gen hardware platforms. You will guide FPGA architecture, collaborate with cross‑functional teams, and deliver robust, scalable solutions.

Requirements include a B.Sc or M.Sc in EE or CE and 8+ years in FPGA design; strong VHDL/SystemVerilog skills; SerDes up to 224Gbps, DDR5, PCIe knowledge; and excellent communication abilities.