Senior FPGA Design Engineer - Onsite, Relocation & 9/8

RTX; Orlando (FL); On-site; USD 87,000 - 165,000; Full time

Benefits offered by this job

Relocation Assistance

9/8 Schedule – every other Friday off!

Job summary

RTX is seeking a Senior FPGA Design Engineer to develop FPGA designs across major vendors (Xilinx, Altera, Microsemi) using VHDL for RF, DSP, data links, and embedded interfaces. You will collaborate with circuit card designers and systems engineers from requirements through integration.

Candidates should have a STEM degree with 5+ years of experience and knowledge of VHDL, Verilog, and SystemVerilog; DoD Secret clearance is required to start. Relocation assistance and a 9/8 schedule are offered.

Qualifications

• Typically requires a STEM degree and a minimum of 5 years of prior relevant experience.
• Experience with VHDL and/or Verilog coding.
• Experience with SystemVerilog coding.
• Experience with Xilinx or Microsemi devices and flow tools.

Responsibilities

• Design and deliver production quality FPGA releases from initial proof of concept up to production.
• Architect FPGA-based systems to determine parts, interfaces, and CONOPS.
• Translate system level requirements into FPGA requirements.
• Design and code in VHDL for reliability and maintainability.
• Verify designs using directed and constrained random tests; track coverage.
• Help drive projects and execute schedules on time and budget.
• Create documentation including requirements, verification plan, and user guides.
• Lead small teams and mentor junior engineers.
• Support internal and external technical reviews.

Skills

VHDL

Verilog

SystemVerilog

Xilinx/Microsemi tools

Education

STEM degree

Tools

Xilinx flow tools

Microsemi tools

Job description

RTX is seeking a Senior FPGA Design Engineer to develop FPGA designs across major vendors (Xilinx, Altera, Microsemi) using VHDL for RF, DSP, data links, and embedded interfaces. You will collaborate with circuit card designers and systems engineers from requirements through integration.

Candidates should have a STEM degree with 5+ years of experience and knowledge of VHDL, Verilog, and SystemVerilog; DoD Secret clearance is required to start. Relocation assistance and a 9/8 schedule are offered.