Senior FPGA/ASIC Verification Architect

Anysilicon; Fort Wayne, Northern (IN, KY); Hybrid; USD 120,000 - 170,000; Full time

Job summary

Collins Aerospace in Fort Wayne, IN is seeking a Principal Electrical or Computer Engineer to lead the design, verification, and testing of advanced ASIC/FPGA solutions for Mission Systems. You will architect verification environments, write test plans, and drive coverage, working with multi-disciplinary teams on high-performance digital blocks.

The role demands a strong background in VHDL/SystemVerilog and RTL verification, plus 4+ years in chip verification.

Qualifications

• Bachelor's degree in STEM with 8 years of experience or an Advanced Degree with 5 years of experience.
• Active U.S. government issued security clearance required prior to start date.
• U.S. citizenship required for security clearance eligibility.
• Experience in developing and simulating RTL designs using VHDL and/or Verilog in a professional environment.
• At least 4 years of experience in chip-level verification methodologies.

Responsibilities

• Architect and design verification environments using SystemVerilog with OVM/UVM.
• Create written test plans, test cases, and track code and functional coverage.
• Develop testbenches for RTL block verification using VHDL or SystemVerilog.
• Recommend tools and practices for continuous improvement in ASIC/FPGA verification flow.
• Provide technical leadership for project verification teams, including planning and status reporting.

Skills

VHDL/SystemVerilog

RTL verification

SystemVerilog UVM

Git/Subversion

Unix/Linux scripting

Team leadership

Communication

ASIC/FPGA tools

Education

Bachelor's degree in STEM

Advanced degree in STEM

Tools

QuestaSim

Synplify

Quartus

Vivado

Git

Subversion

Job description

Collins Aerospace in Fort Wayne, IN is seeking a Principal Electrical or Computer Engineer to lead the design, verification, and testing of advanced ASIC/FPGA solutions for Mission Systems. You will architect verification environments, write test plans, and drive coverage, working with multi-disciplinary teams on high-performance digital blocks.

The role demands a strong background in VHDL/SystemVerilog and RTL verification, plus 4+ years in chip verification.