Lead ASIC/FPGA Verification Engineer (SystemVerilog/UVM)

Collins Aerospace; Cedar Rapids (IA); On-site; USD 90,000 - 120,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks of vacation for newly hired employees

Generous 401(k) plan with employer matching

Tuition reimbursement program

Life insurance and disability coverage

Job summary

Collins Aerospace in Cedar Rapids is seeking an experienced verification engineer to develop and verify testing architectures using SystemVerilog and VHDL. The ideal candidate will have a strong background in RTL design and the security clearance to work on government projects.

Responsibilities include leading verification teams, developing test plans, and ensuring seamless project execution. This position offers a comprehensive benefits package, including medical, dental, vision insurance, and a generous 401(k) plan.

Qualifications

• Minimum 5 years of experience in a related field or 8 years without a degree.
• Must have active U.S. government issued security clearance.
• Experience in RTL design and verification with VHDL/SystemVerilog.

Responsibilities

• Verify environment architecture using SystemVerilog.
• Develop test plans and track code coverage.
• Lead project verification teams and plan activities.

Skills

VHDL

SystemVerilog

ASIC/FPGA development

Git

Unix/Linux

Education

Degree in Science, Technology, Engineering or Mathematics (STEM)

Tools

QuestaSim

Quartus

Vivado

Job description

Collins Aerospace in Cedar Rapids is seeking an experienced verification engineer to develop and verify testing architectures using SystemVerilog and VHDL. The ideal candidate will have a strong background in RTL design and the security clearance to work on government projects.

Responsibilities include leading verification teams, developing test plans, and ensuring seamless project execution. This position offers a comprehensive benefits package, including medical, dental, vision insurance, and a generous 401(k) plan.