Senior FPGA/ASIC Design Engineer for High‑Throughput SOC

CHIPTON-ROSS Inc.; Camden (NJ); On-site; USD 90,000 - 120,000; Full time

Job summary

CHIPTON-ROSS Inc. is seeking an FPGA/ASIC Design Engineer for a contract opportunity in Camden, New Jersey. The ideal candidate will have over 3 years of experience implementing complex algorithms targeting ASICs and FPGAs, along with proficiency in VHDL and Xilinx FPGA/Vivado.

This role requires hands-on experience with architecture and verification, along with a Bachelor’s in Electrical Engineering or Computer Science. Candidates must also have US citizenship and an active secret clearance.

Qualifications

• 3+ years of experience with ASIC/FPGA algorithms.
• Experience with Ethernet protocol beyond IP instantiation is a plus.
• Hands-on with architecture, design, verification, and synthesis.

Responsibilities

• Architect and implement complex FPGA and/or ASIC systems.
• Write and debug tests/sequences for end-to-end simulation.
• Develop architectures for high-throughput designs with cryptographic algorithms.

Skills

VHDL

FPGA design/debug

Analytical/debug skills

Presentation skills

Mentoring EDA CDC/Lint/AC/RDC

Complex algorithm implementation

High-speed protocols knowledge

Education

Bachelor of Science in Electrical Engineering or Computer Science

Master of Science in Electrical Engineering or Computer Science

Tools

Xilinx FPGA/Vivado

UVM framework

SystemVerilog

C++

Job description

CHIPTON-ROSS Inc. is seeking an FPGA/ASIC Design Engineer for a contract opportunity in Camden, New Jersey. The ideal candidate will have over 3 years of experience implementing complex algorithms targeting ASICs and FPGAs, along with proficiency in VHDL and Xilinx FPGA/Vivado.

This role requires hands-on experience with architecture and verification, along with a Bachelor’s in Electrical Engineering or Computer Science. Candidates must also have US citizenship and an active secret clearance.