Senior FPGA Architect - Versal/IGLOO2 & Networking

Socket.dev; Redmond (WA); On-site; USD 159,000 - 215,000; Full time

Job summary

Amazon is seeking an experienced FPGA Design Engineer to create FPGA solutions for LEO's satellite system. You will own FPGA bitstreams and collaborate with system architects to implement networking functions on modern FPGA tech. Expect RTL design, test benches, and lab validation across Versal ACAP and IGLOO2, with cross-team coordination.

Ideal candidates have strong Verilog/SystemVerilog, UVM, and high-speed interface experience, plus tooling proficiency (Vivado/Libero SoC). U.S.

Qualifications

• Bachelor's degree in Electrical Engineering or related field with 10+ years of experience.
• 7+ years of Verilog/SystemVerilog HDL for RTL design and verification with FPGA tools.
• 7+ years of experience with simulation tools (ModelSim, Vivado Simulator, or equivalent).
• 5+ years of experience with UVM (SystemVerilog and/or SystemC).
• Experience with high-speed interfaces (PCIe, DDR, Ethernet, SerDes) and serial protocols (SPI, I2C, I3C, UART).

Responsibilities

• Design, develop, and implement complex FPGA architectures using Verilog HDL.
• Lead FPGA design efforts for Versal ACAP and IGLOO2 platforms from concept through production.
• Develop and optimize RTL code for high-performance designs.
• Perform timing analysis, synthesis, place and route, and design verification.
• Create comprehensive test benches and simulation environments.
• Collaborate with hardware, software, and system architects across teams.
• Debug and troubleshoot FPGA designs at both simulation and hardware levels.
• Develop technical documentation including design specifications, test plans, and user guides.
• Support hardware integration, manufacturing, and production deployment activities.

Skills

Verilog / SystemVerilog HDL

UVM

High-speed interfaces

Serial protocols (SPI, I2C, I3C, UART)

Education

Bachelor's degree in Electrical Engineering or related field

Master's or Ph.D. in Electrical Engineering or related field

Tools

Vivado

Libero SoC

ModelSim

Vivado Simulator

Job description

Amazon is seeking an experienced FPGA Design Engineer to create FPGA solutions for LEO's satellite system. You will own FPGA bitstreams and collaborate with system architects to implement networking functions on modern FPGA tech. Expect RTL design, test benches, and lab validation across Versal ACAP and IGLOO2, with cross-team coordination.

Ideal candidates have strong Verilog/SystemVerilog, UVM, and high-speed interface experience, plus tooling proficiency (Vivado/Libero SoC). U.S.