Senior FPGA Engineer: Satellite Networking (Versal ACAP)

Amazon; Redmond (WA); On-site; USD 159,000 - 215,000; Full time

Benefits offered by this job

Health insurance

RSUs

401(k) matching

Paid time off

Job summary

Amazon is seeking a Senior FPGA Engineer, Payload Hardware Development, in Redmond to own FPGA bitstreams and develop high‑performance networking FPGA designs. You will collaborate with cross‑functional teams to define, implement, and test FPGA-based solutions for LEO satellite communications, using latest FPGA technologies and design processes.

The role requires 10+ years in Electrical Engineering, strong Verilog/SystemVerilog and UVM experience, and hands‑on work with PCIe, DDR and Ethernet.

Qualifications

• Bachelor's degree in Electrical Engineering or related field; 10+ years of experience.
• 7+ years of Verilog/SystemVerilog HDL RTL design and FPGA tool experience.
• 7+ years of simulation tools such as ModelSim or Vivado Simulator.
• 5+ years of UVM (SystemVerilog/SystemC).
• Experience with PCIe, DDR, Ethernet, SerDes and related protocols.

Responsibilities

• Own one or more FPGA bitstreams through all development phases.
• Collaborate with system architects to design/implement/test networking functions on FPGA.
• Develop RTL for high-performance FPGA designs and optimize resources.
• Create test benches and verification environments for FPGA.
• Produce design docs, test plans, and user guides.
• Support hardware integration and production deployment activities.

Skills

Verilog/SystemVerilog HDL

UVM (SystemVerilog/SystemC)

High-speed interfaces knowledge

FPGA bitstream ownership

Education

Bachelor's degree in Electrical Engineering or related field

Master's or Ph.D. preferred

Tools

Vivado

Libero SoC

ModelSim / Vivado Simulator

Synthesis & timing tools

Job description

Amazon is seeking a Senior FPGA Engineer, Payload Hardware Development, in Redmond to own FPGA bitstreams and develop high‑performance networking FPGA designs. You will collaborate with cross‑functional teams to define, implement, and test FPGA-based solutions for LEO satellite communications, using latest FPGA technologies and design processes.

The role requires 10+ years in Electrical Engineering, strong Verilog/SystemVerilog and UVM experience, and hands‑on work with PCIe, DDR and Ethernet.