Senior FPGA Engineer, Payload Hardware Development, Leo PAA Hardware

Amazon

Redmond (WA)

On-site

USD 159,000 - 215,000

Full time

2 days ago
Be an early applicant

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Health insurance
RSUs
401(k) matching
Paid time off

Job summary

Amazon is seeking a Senior FPGA Engineer, Payload Hardware Development, in Redmond to own FPGA bitstreams and develop high‑performance networking FPGA designs. You will collaborate with cross‑functional teams to define, implement, and test FPGA-based solutions for LEO satellite communications, using latest FPGA technologies and design processes.

The role requires 10+ years in Electrical Engineering, strong Verilog/SystemVerilog and UVM experience, and hands‑on work with PCIe, DDR and Ethernet.

Qualifications

  • Bachelor's degree in Electrical Engineering or related field; 10+ years of experience.
  • 7+ years of Verilog/SystemVerilog HDL RTL design and FPGA tool experience.
  • 7+ years of simulation tools such as ModelSim or Vivado Simulator.
  • 5+ years of UVM (SystemVerilog/SystemC).
  • Experience with PCIe, DDR, Ethernet, SerDes and related protocols.

Responsibilities

  • Own one or more FPGA bitstreams through all development phases.
  • Collaborate with system architects to design/implement/test networking functions on FPGA.
  • Develop RTL for high-performance FPGA designs and optimize resources.
  • Create test benches and verification environments for FPGA.
  • Produce design docs, test plans, and user guides.
  • Support hardware integration and production deployment activities.

Skills

Verilog/SystemVerilog HDL
UVM (SystemVerilog/SystemC)
High-speed interfaces knowledge
FPGA bitstream ownership

Education

Bachelor's degree in Electrical Engineering or related field
Master's or Ph.D. preferred

Tools

Vivado
Libero SoC
ModelSim / Vivado Simulator
Synthesis & timing tools

Job description

Senior FPGA Engineer, Payload Hardware Development, Leo PAA Hardware

Job ID: 10507266 | Amazon Kuiper Manufacturing Enterprises LLC


LEO is Amazon’s low Earth orbit satellite broadband network. Its mission is to deliver fast, reliable internet to customers and communities around the world, and we’ve designed the system with the capacity, flexibility, and performance to serve a wide range of customers, from individual households to schools, hospitals, businesses, government agencies, and other organizations operating in locations without reliable connectivity.


The Role

Create FPGA solutions to support LEO's satellite communication system. This is a unique opportunity to define a new system with few legacy constraints. The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to enable LEO. This will focus on creating digital designs for networking functions using the latest generations of FPGA technologies and modern FPGA design processes and tools.


In this role you will


  • Have ownership of one or more FPGA bitstreams. - Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure–Simulation Validation– Lab Based Silicon Validation

  • Collaborate with network communication system architects to define and design/implement/test/release/support networking functions targeted to FPGA technology

  • Collaborate with Digital Communications/Networking system architects and design engineers to implement digital logic functions in FPGAs.

  • Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives

  • Collaborate with systems architects, HW engineering design teams & FW/SW design teams to bring up and test systems combining FPGA, firmware, RF, and Networking functions.

  • Drive trade‑off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features

  • Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.


Key job responsibilities


  • Design, develop, and implement complex FPGA architectures using Verilog HDL

  • Lead FPGA design efforts for Versal ACAP and IGLOO2 platforms from concept through production

  • Develop and optimize RTL code for high-performance, resource‑efficient designs

  • Perform timing analysis, synthesis, place and route, and design verification

  • Create comprehensive test benches and simulation environments

  • Collaborate with cross‑functional teams including hardware engineers, software developers, and system architects

  • Debug and troubleshoot FPGA designs at both simulation and hardware levels

  • Develop technical documentation including design specifications, test plans, and user guides

  • Support hardware integration, manufacturing, and production deployment activities


Basic Qualifications


  • Bachelor's degree in Electrical Engineering or a related field with 10+ years of experience

  • 7+ years of experience with Verilog and/or SystemVerilog HDL for RTL design and verification and with FPGA design tools (Vivado, Libero SoC, or equivalent)

  • 7+ years of experience with simulation tools ModelSim, Vivado Simulator, or equivalent

  • 5+ years of experience with UVM (SystemVerilog and/or SystemC)

  • Experience with high-speed interfaces (PCIe, DDR, Ethernet, SerDes) and serial protocols (SPI, I2C, I3C, UART)


Preferred Qualifications


  • Master's or Ph.D. degree in Electrical Engineering or related field with 7+ years of experience

  • Experience with AMD Xilinx Versal ACAP FPGA architecture and development tools and with Microchip IGLOO2 FPGA platform

  • Experience delivering products to volume production

  • Experience with implementing chips with multiple power islands and power gating

  • Experience with SOC bring‑up and post‑silicon validation

  • Background in signal processing, communications, or related applications


Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.


Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.


The base salary range for this position is listed below. Your Amazon package will include sign‑on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.


USA, WA, Redmond - 159,200.00 - 215,300.00 USD annually

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior FPGA Engineer, LEO Payload FPGA
Senior FPGA Engineer, LEO Payload FPGA

Amazon • Redmond (WA)

On-site
USD 183,000 - 248,000
Senior FPGA Engineer, LEO Payload FPGA
Senior FPGA Engineer, LEO Payload FPGA

Amazon • Sunnyvale (CA)

On-site
USD 183,000 - 248,000
Health insurance
RSUs
401(k) matching
+3
Senior FPGA Engineer, LEO Payload FPGA
Senior FPGA Engineer, LEO Payload FPGA

Amazon • Los Angeles (CA)

On-site
USD 183,000 - 248,000
Health insurance
RSUs / equity compensation
Paid time off
+1
FPGA Engineer, Amazon LEO OISL
FPGA Engineer, Amazon LEO OISL

Amazon • Redmond (WA)

On-site
USD 117,300 - 160,000
401(k) matching
Paid time off
Health insurance
+1
Sr. FPGA Engineer, Direct to Device, Amazon Leo
Sr. FPGA Engineer, Direct to Device, Amazon Leo

Amazon • Denver (CO)

On-site
USD 151,000 - 205,000
Health insurance
401(k) matching
Paid time off
Sr HW Dev Engineer - Payload, Amazon Leo Hardware Development
Sr HW Dev Engineer - Payload, Amazon Leo Hardware Development

Amazon • Redmond (WA)

On-site
USD 137,300 - 185,700
RSUs
Sign‑on bonus
Health insurance
+3
HW Dev Engineer II - Payload, Amazon Leo Hardware Development
HW Dev Engineer II - Payload, Amazon Leo Hardware Development

Amazon • Redmond (WA)

On-site
USD 136,000 - 184,000
Senior HW Dev Engineer-Payload, LEO
Senior HW Dev Engineer-Payload, LEO

Amazon • Redmond (WA)

On-site
USD 137,000 - 186,000
Health insurance
RSUs
Sign-on payments
+3
Senior HW Dev Engineer-Payload, Leo PAA Hardware
Senior HW Dev Engineer-Payload, Leo PAA Hardware

Amazon • Redmond (WA)

On-site
USD 159,000 - 215,000
Health insurance
401(k) matching
Paid time off
+1
HW Dev Engineer-Payload, LEO
HW Dev Engineer-Payload, LEO

Amazon • Redmond (WA)

On-site
USD 117,000 - 160,000
Health insurance
401(k) matching
Paid time off
+1