Senior FPGA Engineer – LEO Satellite Networking

Amazon

Sunnyvale (CA)

On-site

USD 183,000 - 248,000

Full time

14 days+

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Benefits offered by this job

Health insurance
RSUs
401(k) matching
Paid time off
Parental leave
Accommodations

Job summary

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale, CA is seeking an experienced FPGA design engineer to create FPGA solutions for the LEO satellite broadband network. You will own FPGA bitstreams and collaborate with systems teams to implement networking functionality on FPGA hardware.

Responsibilities include defining and releasing FPFA-based designs across development phases, optimizing timing, and validating silicon with cross-functional teams in HW, FW, and networking.

Qualifications

  • 7+ years FPGA design and implementation experience using SystemVerilog.
  • Experience with modern ASIC/FPGA design and verification tools.
  • Experience writing test scripts (Python preferred) to validate FPGA images in hardware.
  • Experience with Xilinx/AMD or Altera FPGAs.

Responsibilities

  • Create FPGA solutions to support LEO's satellite communication system.
  • Own one or more FPGA bitstreams and release FPGAs through all development phases.
  • Collaborate with network and system architects to define and design networking functions in FPGA.
  • Implement digital logic functions in FPGAs in collaboration with design engineers.
  • Prototype FPGA tests with system architects to validate architecture and design choices.
  • Work with HW, FW/SW teams to bring up and test systems integrating FPGA, firmware, RF and networking.
  • Drive trade-off analyses to optimize cost, size, power and performance for customers.

Skills

SystemVerilog
FPGA design
Python scripting
ASIC/FPGA tools

Education

Bachelor's degree in Electrical Engineering

Tools

FPGA vendors

Job description

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale, CA is seeking an experienced FPGA design engineer to create FPGA solutions for the LEO satellite broadband network. You will own FPGA bitstreams and collaborate with systems teams to implement networking functionality on FPGA hardware.

Responsibilities include defining and releasing FPFA-based designs across development phases, optimizing timing, and validating silicon with cross-functional teams in HW, FW, and networking.

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