Senior FPGA Architect - Space Rover Avionics & RTL

WarmStart Ltd; Hawthorne, Northern (CA, KY); Hybrid; USD 150,000 - 210,000; Full time

Job summary

Venturi Astrolab, Inc. seeks a Staff FPGA Engineer to lead the architecture, development, and verification of avionics FPGA RTL designs for rover systems. You will drive flight-ready implementations and collaborate across cross-functional teams to ensure mission-ready performance.

The role demands 10+ years of FPGA RTL experience, strong SystemVerilog or VHDL skills, and proven verification expertise, including AXI interfaces and embedded software integration.

Qualifications

• Bachelor of Science degree in Computer Engineering, Electrical Engineering, or equivalent.
• 10+ years of experience in FPGA RTL architecture, development, verification, and lifecycle support.

Responsibilities

• Lead FPGA RTL development from initial concept to flight readiness.
• Define FPGA logical architecture and requirements in collaboration with cross-functional teams.
• Develop FPGA RTL for Microsemi, Xilinx, or similar devices using SystemVerilog or VHDL.
• Perform comprehensive design verification, including simulations and hardware validation.
• Lead design reviews and ensure requirement traceability.
• Create clear documentation for FPGA operation and integration.
• Develop and execute test campaigns from unit-level validation to system-level testing.
• Support integration, bring up, and troubleshooting during system-level and flight tests.

Skills

SystemVerilog

VHDL

Python

Tcl

Shell

Timing analysis

PCB schematics reading

HW/SW integration

AXI4

SPI I2C UART

Education

Bachelor of Science in Computer Engineering / Electrical Engineering

Tools

Microsemi FPGA

Xilinx FPGA

ModelSim

Vivado

Job description

Venturi Astrolab, Inc. seeks a Staff FPGA Engineer to lead the architecture, development, and verification of avionics FPGA RTL designs for rover systems. You will drive flight-ready implementations and collaborate across cross-functional teams to ensure mission-ready performance.

The role demands 10+ years of FPGA RTL experience, strong SystemVerilog or VHDL skills, and proven verification expertise, including AXI interfaces and embedded software integration.