Senior FPGA Architect – RTL & Signal Processing

Silvus Technologies; Irvine (CA); Hybrid; USD 125,000 - 195,000; Full time

Job summary

A technology solutions provider is seeking a Principal FPGA / RTL Design Engineer in California. You will work with an innovative team on advanced wireless networking products, leading the RTL design and FPGA implementation efforts. The ideal candidate will have extensive experience in digital signal processing and must be a U.S. citizen or permanent resident. This position offers a hybrid work environment with a competitive salary range of $125,000 to $195,000.

Qualifications

• Minimum 10 years of experience in RTL design and FPGA implementation.
• Deep knowledge of fixed point binary arithmetic.
• Experience with front-end RTL design tools.

Responsibilities

• Drive the RTL coding, simulation, and test bench development.
• Perform FPGA synthesis and timing closure.
• Provide support to RF and Software Engineering Teams.

Skills

RTL design

FPGA implementation

Digital signal processing

Verilog

System-Verilog

FPGA synthesis

Timing closure

Education

Bachelor of Science in Electrical Engineering or Computer Science

Tools

Xilinx FPGAs

Vivado IDE

Job description

A technology solutions provider is seeking a Principal FPGA / RTL Design Engineer in California. You will work with an innovative team on advanced wireless networking products, leading the RTL design and FPGA implementation efforts. The ideal candidate will have extensive experience in digital signal processing and must be a U.S. citizen or permanent resident. This position offers a hybrid work environment with a competitive salary range of $125,000 to $195,000.