Senior FPGA/RTL Design Engineer, Signal Processing

Silvus Technologies; Los Angeles (CA); Hybrid; USD 195,000 - 235,000; Full time

Benefits offered by this job

Incentive Bonus Plans

Medical, Dental, Vision benefits

401K with Company Match

10 Paid Holidays

Generous Paid Time Off

Employee Stock Purchase Plan

Paid Parental & Family Leave

Job summary

Silvus Technologies is seeking a Principal FPGA/RTL Design Engineer - Signal Processing to join the FPGA Engineering team in West Los Angeles, CA. The role reports to the Director of FPGA Engineering and spans concept to field deployment for innovative MIMO wireless systems.

The position is hybrid with a minimum of three onsite days weekly (Mon, Wed, Thu). Requires extensive RTL/FPGA experience, Xilinx expertise, and U.S. citizenship or permanent residency for U.S. federal contracts.

Qualifications

• Bachelor of Science degree in Electrical Engineering, Computer Science, or related field.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; or 8 years with a Master’s; or 6 years with a PhD.
• Experience with fixed point binary arithmetic and digital signal processing designs.
• Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
• Must be a U.S. Person due to U.S. federal contract.
• Background check and drug test required.

Responsibilities

• Digital design architecting for wireless projects.
• Fixed point design of signal processing blocks with system engineers.
• RTL coding, simulation, and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting with logic analyzers.
• Support to RF and Software Engineering teams.
• Other related duties as required.

Skills

RTL design

FPGA implementation

Clock-domain design

Digital signal processing

MATLAB basics

Education

B.S. in Electrical Engineering or related

M.S. or Ph.D. preferred

Tools

Xilinx FPGAs/SoCs

Vivado IDE

Job description

Silvus Technologies is seeking a Principal FPGA/RTL Design Engineer - Signal Processing to join the FPGA Engineering team in West Los Angeles, CA. The role reports to the Director of FPGA Engineering and spans concept to field deployment for innovative MIMO wireless systems.

The position is hybrid with a minimum of three onsite days weekly (Mon, Wed, Thu). Requires extensive RTL/FPGA experience, Xilinx expertise, and U.S. citizenship or permanent residency for U.S. federal contracts.