Senior FPGA Architect for High-Performance Compute Test

Teradyne; Tualatin (OR); On-site; USD 192,000 - 308,000; Full time

Job summary

Teradyne's Compute Test Division seeks a Senior FPGA Architect to lead high-performance FPGA-based solutions at the heart of our test platforms. You will work at the intersection of FPGA design, board-level hardware, and system architecture to address high-speed interfaces and tight timing margins.

You will collaborate with cross-functional teams to deliver robust, scalable solutions that impact the quality and performance of modern semiconductor devices.

Qualifications

• 8+ years of hands-on experience in FPGA design and development.
• Deep expertise in Verilog/SystemVerilog for design and debugging.
• Experience with AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure.
• Experience with high-speed interfaces such as PCIe, DDR, SerDes, or similar.
• Demonstrated ability to bring up and debug FPGA designs on hardware platforms.
• Experience with protocols such as AXI4, USB, I2C, SPI.

Responsibilities

• Drive FPGA design from architecture through implementation and bring-up.
• Architect and implement high-performance FPGA solutions involving complex interfaces and subsystem integration.
• Partner with hardware, software, and system engineering teams to deliver cohesive system-level solutions.
• Lead timing closure, resource optimization, and performance tuning for advanced FPGA designs.
• Define and execute validation strategies, including lab bring-up, debug, and root cause analysis using JTAG and lab instrumentation.
• Develop automation and debug tools using scripting (TCL, Python) to improve workflows.

Skills

FPGA design

Verilog/SystemVerilog

Xilinx/AMD toolchains

Timing closure

PCIe/SerDes

Python scripting

UVM verification

JTAG debugging

Tools

JTAG

Job description

Teradyne's Compute Test Division seeks a Senior FPGA Architect to lead high-performance FPGA-based solutions at the heart of our test platforms. You will work at the intersection of FPGA design, board-level hardware, and system architecture to address high-speed interfaces and tight timing margins.

You will collaborate with cross-functional teams to deliver robust, scalable solutions that impact the quality and performance of modern semiconductor devices.