Senior FPGA Architect — Avionics, HDL & Verification

Northrop Grumman; United States; On-site; USD 114,000 - 171,000; Full time

Benefits offered by this job

Health insurance

Life and disability insurance

Savings plan

Paid holidays and PTO

Job summary

Northrop Grumman in Rancho Bernardo, CA is seeking a Sr. Principal FPGA Design Engineer to support the Common Products Circuit Design organization.

You will design, implement and verify HDL for avionics computer functions, collaborate with hardware, firmware and software teams, and drive synthesis, timing closure and verification across the product lifecycle.

The role requires a STEM degree and 8+ years, experience with Vivado, AMD FPGAs, and UVM, and the ability to obtain US Secret Clearance.

Qualifications

• Bachelor’s degree in a STEM discipline with 8+ years of related engineering experience OR Master’s with 6+ years OR PhD with 4+ years.
• Digital circuit design experience, including simulation & schematic capture through test and integration.
• Hands-on prototyping and debug with FPGAs and embedded processors; high-speed interfaces.
• Experience with AMD FPGAs and the Vivado tool (or equivalents).
• Experience with OVM/UVM verification methodologies.
• Ability to obtain and maintain US Government Secret Clearance.

Responsibilities

• FPGA Architecture and design to support avionics computer functions.
• Translate system requirements to FPGA requirements and design specs.
• HDL coding & implementation in collaboration with hardware, firmware and software teams.
• Create test benches and verification environments; perform timing and synthesis simulations.
• Support timing closure, resource optimization and documentation of findings.

Skills

FPGA Architecture & Design

Digital circuit design

Vivado tool

OVM/UVM verification

US Secret Clearance eligibility

Education

Bachelor's degree in STEM

Master's degree in STEM

PhD in STEM

Tools

AMD FPGAs

Vivado

Job description

Northrop Grumman in Rancho Bernardo, CA is seeking a Sr. Principal FPGA Design Engineer to support the Common Products Circuit Design organization.

You will design, implement and verify HDL for avionics computer functions, collaborate with hardware, firmware and software teams, and drive synthesis, timing closure and verification across the product lifecycle.

The role requires a STEM degree and 8+ years, experience with Vivado, AMD FPGAs, and UVM, and the ability to obtain US Secret Clearance.