Avionics FPGA Design Lead (Senior)

Transmission & Distribution World

San Diego (CA)

On-site

USD 114,000 - 171,000

Full time

9 days ago

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Benefits offered by this job

Health insurance
Life insurance
Savings plan
Paid time off

Job summary

Northrop Grumman Aeronautics Systems seeks a Sr. Principal FPGA Design Engineer in Rancho Bernardo, CA to design, implement, and verify HDL for avionics FPGA-based products.

You will define HW/SW interfaces, establish development workflows, and collaborate across hardware, software, and systems teams to streamline time-to-market for safety-critical designs. The role emphasizes FPGA architecture, HDL coding, verification, and real-time performance, with extensive collaboration and a focus on

Qualifications

  • Bachelor’s degree in a STEM discipline with 8 years of related engineering experience; OR Master’s degree in a STEM discipline with 6 years of related experience; OR PhD in a STEM discipline with 4 year of related experience
  • Digital circuit design experience with simulation & schematic capture
  • Experience with FPGAs and embedded processors with high-speed interfaces

Responsibilities

  • Define FPGA architecture and logic design to support avionics computer functions
  • Translate system requirements to FPGA requirements and design specs
  • Develop synthesizable HDL code and test benches for FPGA functionality
  • Perform timing closure and synthesis with Vivado
  • Collaborate with hardware, firmware, and software teams
  • Support HW-in-the-loop and system integration testing

Skills

FPGA design
HDL coding
System integration
Verification
UVM/OVM
Problem solving

Education

Bachelor's degree in STEM
Master's degree in STEM
PhD in STEM

Tools

Vivado
AMD FPGAs
PCIe
SPI/I2C/UART/Ethernet

Job description

Northrop Grumman Aeronautics Systems seeks a Sr. Principal FPGA Design Engineer in Rancho Bernardo, CA to design, implement, and verify HDL for avionics FPGA-based products.

You will define HW/SW interfaces, establish development workflows, and collaborate across hardware, software, and systems teams to streamline time-to-market for safety-critical designs. The role emphasizes FPGA architecture, HDL coding, verification, and real-time performance, with extensive collaboration and a focus on

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