Senior FPGA/AIE SDR Engineer for Space Systems

Elveo; Chantilly (VA); On-site; USD 120,000 - 190,000; Full time

Job summary

Elveo seeks a Senior FPGA/AIE Engineer to design and test high-speed FPGA systems for satellite communications. You will work with AMD Versal IPs, implement DSP algorithms, and develop Linux device drivers. The role covers lab testing, payload prototype validation, and space-qualified execution.

Candidates should have 5+ years in FPGA work, plus experience with Xilinx/Altera FPGAs and SystemVerilog or AIE-ML programming. ITAR eligibility is required.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• At least five years of recent related experience.
• At least three years of recent experience working with Xilinx/Altera FPGAs.

Responsibilities

• Design and test high-speed FPGA systems for satellite communication systems.
• Build with AMD Versal hard IP such as AIE, NoC, CIPS, MRMAC, and DDR controllers.
• Model and implement DSP algorithms in RTL or AMD AIE/AIE-ML processors.
• Implement device driver software in C, C++, or other languages for a Linux environment.
• Develop and maintain documentation and ICDs for in-house IP blocks and other related components.

Skills

SystemVerilog programming

AMD Versal SoC programming

AIE-ML programming

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Tools

Xilinx/Altera FPGAs

Job description

Elveo seeks a Senior FPGA/AIE Engineer to design and test high-speed FPGA systems for satellite communications. You will work with AMD Versal IPs, implement DSP algorithms, and develop Linux device drivers. The role covers lab testing, payload prototype validation, and space-qualified execution.

Candidates should have 5+ years in FPGA work, plus experience with Xilinx/Altera FPGAs and SystemVerilog or AIE-ML programming. ITAR eligibility is required.