Senior Formal Verification Architect for Complex SoCs

SiFive

Austin (TX)

On-site

USD 280,000 - 342,000

Full time

20 hours ago
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Benefits offered by this job

Healthcare coverage
Retirement plan
Paid time off

Job summary

SiFive is seeking a Distinguished Formal Verification Architect in the United States (Austin, TX) to define end-to-end verification strategies for complex SoCs and IP subsystems. The role requires multiple years of HW verification experience and expertise with VCFormal/Jasper Gold, with a strong emphasis on correctness-by-construction and large-scale abstractions.

The successful candidate will lead formal methods or co-verification efforts, shaping verification quality beyond device-level

Qualifications

  • Multiple years of experience with formal verification of cutting edge HW designs.
  • Experience with model checkers such as VCFormal, Jasper Gold.
  • Proficient in working with large designs and standard practices for abstractions, etc. for dealing with large systems
  • Excellent understanding of HW design and idioms, e.g. CPU microarchitecture, communications fabrics, protocols, etc, and how to map them to formal verification needs
  • Strong logical thinking
  • Strategic thinking and ownership to close verification with formal methods or formal/simulation co-verification

Responsibilities

  • Deep expertise in complexity management, abstraction techniques and exhaustive verification.
  • Expert in identifying high-risk architectural corners and developing formal methodology.
  • Adept at proof convergence and thinking in terms of correct-by construction, working not just with individual designs but classes of design.
  • As the Architect, it is important to go beyond application of formal techniques to understand the design and find ways to improve the quality of verification by reshaping the implementation.

Skills

Formal verification
Model checking
Large designs
HW design
Logical thinking
Co-verification

Tools

VCFormal
Jasper Gold

Job description

SiFive is seeking a Distinguished Formal Verification Architect in the United States (Austin, TX) to define end-to-end verification strategies for complex SoCs and IP subsystems. The role requires multiple years of HW verification experience and expertise with VCFormal/Jasper Gold, with a strong emphasis on correctness-by-construction and large-scale abstractions.

The successful candidate will lead formal methods or co-verification efforts, shaping verification quality beyond device-level

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