Senior Fellow: Memory PHY Architect for AI/SoCs

Advanced Micro Devices, Inc.; Santa Clara (CA); Vor Ort; USD 210.000 - 320.000; Vollzeit

Zusammenfassung

Advanced Micro Devices, Inc. (AMD) seeks a senior technical leader to shape memory interface technology at scale. You will define architectures for Memory PHYs (DDR, LPDDR, GDDR, HBM) and guide long-range roadmaps in collaboration with global teams.

Ideal candidates bring 15+ years of high-speed analog/mixed-signal design experience, strong architectural influence, and a track record across multiple tape-outs. This flexible Bay Area role emphasizes technical ownership over people management.

Qualifikationen

• 15+ years of high-speed analog, mixed-signal, or memory PHY design experience.
• Experience shaping architecture across multiple tape-outs.
• Strong understanding of memory protocols and CMOS technologies.

Aufgaben

• Define and evolve architectures and specifications for Memory PHYs (DDR, LPDDR, GDDR, HBM).
• Drive long-range roadmaps and technical direction for memory interface IP.
• Mentor engineers and influence across organizational boundaries.

Kenntnisse

Memory PHY design

High-speed I/O

CMOS technologies

Architectural leadership

Cross-functional collaboration

Ausbildung

Advanced degree in Electrical Engineering

PhD or MS in EE

Jobbeschreibung

Advanced Micro Devices, Inc. (AMD) seeks a senior technical leader to shape memory interface technology at scale. You will define architectures for Memory PHYs (DDR, LPDDR, GDDR, HBM) and guide long-range roadmaps in collaboration with global teams.

Ideal candidates bring 15+ years of high-speed analog/mixed-signal design experience, strong architectural influence, and a track record across multiple tape-outs. This flexible Bay Area role emphasizes technical ownership over people management.