Senior ESD & Latch-Up Engineer, HBM & DRAM

1000 Micron Technology, Inc.

Folsom (CA)

On-site

USD 175,000 - 297,000

Full time

14 days+

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Job summary

Micron Technology, Inc. in the United States is seeking an ESD & Latch Up Engineer to define protection strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces. You will work with design, packaging, reliability, and product teams to ensure robust protection and sign-off per JEDEC/ESDA standards.

The role requires hands-on experience with ESD circuits, latch up prevention, and familiarity with JEDEC/ESDA guidelines. A Master’s or Ph.D.

Qualifications

  • Master’s degree or Ph.D. in Electrical Engineering or equivalent industry experience.
  • Strong fundamentals in ESD physics, latch up mechanisms, and advanced CMOS devices.
  • Hands-on experience with ESD protection circuits and latch up prevention techniques.
  • Familiarity with JEDEC and ESDA standards, including HBM, CDM, and JESD78.

Responsibilities

  • Define chip-level and IP-level ESD and latch up strategies for HBM DRAM and interfaces.
  • Establish ESD and latch up requirements, targets, and sign-off criteria per JEDEC/ESDA.
  • Enable ESD protection circuits and latch up safe layout across designs and technologies.
  • Lead silicon validation, failure analysis, and correlation of pre-silicon to silicon results.
  • Interface with foundries and partner with design, packaging, reliability, and product teams.

Skills

ESD physics
Latch up mechanisms
CMOS devices
ESD protection circuits
JEDEC/ESDA standards

Education

Master’s or Ph.D. in Electrical Engineering

Job description

Micron Technology, Inc. in the United States is seeking an ESD & Latch Up Engineer to define protection strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces. You will work with design, packaging, reliability, and product teams to ensure robust protection and sign-off per JEDEC/ESDA standards.

The role requires hands-on experience with ESD circuits, latch up prevention, and familiarity with JEDEC/ESDA guidelines. A Master’s or Ph.D.

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