Senior Emulation Engineer — AGI SoC Connectivity

MatX; Mountain View (CA); Hybrid; USD 250,000 - 600,000; Full time

Benefits offered by this job

4 weeks PTO (accrued)

Up to 3 weeks remote work

Health insurance

401K with company contribution

Life insurance

Job summary

MatX is seeking a Senior/Staff Emulation Engineer in Mountain View to build and optimize emulation/integration flows for connectivity SoCs. You will work across RTL, software, tooling, and vendor flows, delivering reusable transactors and acceleration to support GenAI-ready silicon.

The role requires hands-on SoC emulation, experience with Palladium or similar platforms, and strong software automation skills (Python plus C/C++, Rust, or TCL).

Qualifications

• Emulation or system-level validation experience.
• Experience with at least one commercial emulation platform (e.g., Palladium).
• Strong RTL/verification skills; ability to build tools and flows.
• Strong software/automation skills (Python and at least one of C/C++/Rust/Tcl).
• Ability to work across RTL, firmware, software and DV teams.

Responsibilities

• Define and execute emulation strategy and test plans for complex connectivity SoCs.
• Bring up and debug large-scale models on emulation platforms.
• Integrate external components and build custom transactors/agents.
• Develop HW/SW co-emulation and co-simulation flows using RTL and software models.
• Build reusable transactors, agents, stubs, and acceleration flows.
• Drive speed-ups and optimize resource usage in emulation flows.
• Create regression automation for debugging and triage.
• Develop AI-assisted tooling for log analysis and flow generation.
• Collaborate with architecture, RTL, DV, firmware, driver, and validation teams.

Skills

SoC emulation expertise

Verilog/SystemVerilog

Python/C/C++/Rust

automation

system-level debugging

Tools

Cadence Palladium

Zebu

Veloce

Job description

MatX is seeking a Senior/Staff Emulation Engineer in Mountain View to build and optimize emulation/integration flows for connectivity SoCs. You will work across RTL, software, tooling, and vendor flows, delivering reusable transactors and acceleration to support GenAI-ready silicon.

The role requires hands-on SoC emulation, experience with Palladium or similar platforms, and strong software automation skills (Python plus C/C++, Rust, or TCL).