Senior EDA Tools & Hardware Engineer - Hybrid

Intel Corporation; Austin (TX); Hybrid; USD 142,000 - 269,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Hybrid work model

Job summary

Intel Corporation in the United States is seeking a Senior EDA Tools Hardware Engineer to develop and maintain transistor-level timing characterization flows for custom IPs, embedded memories, SRAMs, register files, and compiler-generated macros across advanced technologies.

You will collaborate with design, STA, and methodology teams to enable silicon-accurate timing, power, and noise modeling flows, using Synopsys NanoTime and Cadence Liberate, with emphasis on automation and scalable CAD

Qualifications

• Degree in computer engineering, electrical engineering, computer science, or related field with relevant experience.
• 3+ years of timing characterization experience with Nanotime, Liberate, or PrimeLib.
• Experience with Liberty timing models.

Responsibilities

• Develop, test, and analyze EDA tools, flows, and methodologies to improve efficiency and optimize power and performance.
• Collaborate with EDA vendors to define, evaluate, and test next-generation design tools and flows.
• Create and verify hardware designs, integrating components into hierarchical systems for end-to-end EDA tool testing.
• Define methodologies for hardware development related to EDA tools and technology node advancements.
• Support and enhance platforms, databases, scripts, and tools used for design automation.
• Provide digital design, verification, full-chip integration, physical layout, power, performance, clocking, and timing for future TFM development.

Skills

Timing characterization

Liberty timing models

SPICE simulation

Automation

Education

Bachelor's degree in Computer Engineering / Electrical Engineering / Computer Science or related field

Master's degree in Computer Engineering / Electrical Engineering / Computer Science or related field

Ph.D. in Computer Engineering / Electrical Engineering / Computer Science or related field

Tools

Synopsys NanoTime

Cadence Liberate

Job description

Intel Corporation in the United States is seeking a Senior EDA Tools Hardware Engineer to develop and maintain transistor-level timing characterization flows for custom IPs, embedded memories, SRAMs, register files, and compiler-generated macros across advanced technologies.

You will collaborate with design, STA, and methodology teams to enable silicon-accurate timing, power, and noise modeling flows, using Synopsys NanoTime and Cadence Liberate, with emphasis on automation and scalable CAD