MediaTek is seeking a Verification Engineer in San Jose, California. The ideal candidate will lead the DV effort for a high-end CPU project and have 10+ years of verification experience. Responsibilities include architecting and implementing testbenches, working with cross-functional teams, and ensuring comprehensive coverage. A competitive salary range of $179,100 to $301,000 is offered, along with performance bonuses and various benefits including health coverage, 401K, and paid leave.
Qualifications
10+ years of experience in verification.
Familiarity with ARM, RISC-V instruction set architectures.
Hands-on experience in cache-coherent fabric verification.
Responsibilities
Lead the DV effort of a high‑end CPU project.
Architect and implement testbenches using UVM methods.
Work with the design team to create testplans.
Triage bug reports and drive testcase generation.
Skills
Verification experience
SystemVerilog
UVM
Scripting capability
Communication skills
Cross-site execution skills
Education
Masters/Bachelor's in electrical engineering, computer science, mathematics, or physics
Job description
MediaTek is seeking a Verification Engineer in San Jose, California. The ideal candidate will lead the DV effort for a high-end CPU project and have 10+ years of verification experience. Responsibilities include architecting and implementing testbenches, working with cross-functional teams, and ensuring comprehensive coverage. A competitive salary range of $179,100 to $301,000 is offered, along with performance bonuses and various benefits including health coverage, 401K, and paid leave.