Principal DV Engineer

MediaTek; San Jose (CA); Sur place; USD 179 100 - 301 000; Plein temps

Avantages offerts par ce poste

Comprehensive health insurance

Life and disability insurance

401K

Paid holidays

Vacation time

Parental leave

Résumé du poste

MediaTek is seeking a Verification Engineer in San Jose, California. The ideal candidate will lead the DV effort for a high-end CPU project and have 10+ years of verification experience. Responsibilities include architecting and implementing testbenches, working with cross-functional teams, and ensuring comprehensive coverage. A competitive salary range of $179,100 to $301,000 is offered, along with performance bonuses and various benefits including health coverage, 401K, and paid leave.

Qualifications

• 10+ years of experience in verification.
• Familiarity with ARM, RISC-V instruction set architectures.
• Hands-on experience in cache-coherent fabric verification.

Responsabilités

• Lead the DV effort of a high‑end CPU project.
• Architect and implement testbenches using UVM methods.
• Work with the design team to create testplans.
• Triage bug reports and drive testcase generation.

Connaissances

Verification experience

SystemVerilog

UVM

Scripting capability

Communication skills

Cross-site execution skills

Formation

Masters/Bachelor's in electrical engineering, computer science, mathematics, or physics

Description du poste

Job Description

• Lead the DV effort of a high‑end CPU project.
• Architect and implement testbenches and their components using UVM‑based methods.
• Lead the effort in building in‑house BFMs, unit‑level testbenches and stimulus.
• Work with the design team to create testplans. Implement checkers/assertions/coverages. Drive directed testcases and controlled random testcases based on the testplans.
• Work on the core‑level verification using in‑house testbenches. Triage bug reports, profile failure cases, check functional coverage and drive the effort of directed testcase generation.

Main Requirements and Qualifications

• Masters/Bachelor or above degree in electronic/electrical engineering, computer science, mathematics or physics.
• 10+ years of verification experience.
• Familiar with industry instruction set architects such as ARM, RISC‑V and etc.
• Hands‑on experience in the field of cache‑coherent fabric verification.
• Solid experience with SystemVerilog, UVM and etc.
• Experience with major processor blocks.
• Scripting capability is highly desired.
• Good written and verbal communication skills.
• Good cross‑site and cross‑function execution skills.

Salary range: $179,100-$301,000 employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications.

In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, cultural affiliation, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.