Senior DL CUDA Tile Compiler — MLIR/Lowering + Equity

Nvidia Corporation in; Santa Clara (CA); On-site; USD 152,000 - 242,000; Full time

Job summary

NVIDIA is hiring a Senior DL Compiler Engineer for the CUDA Tile team in Santa Clara, CA. You will design and implement compiler transformations, MLIR dialects, and lowering passes to optimize tile-based kernels across GPU generations.

Ideal candidates have 3+ years in compiler optimization, strong C/C++ skills, and the ability to lead projects in a dynamic, product-focused team. CUDA/MLIR/LLVM experience is a plus.

Qualifications

• Bachelors, Masters or Ph.D. in Computer Science, Computer Engineering or related field (or equivalent).
• 3+ years of relevant work or research experience in compiler optimization, performance analysis and IR design.
• Excellent C/C++ programming and software design skills, including debugging, performance analysis, and test design.
• Ability to work independently, define project goals and scope, and lead development efforts.

Responsibilities

• In this role, you will design and implement compiler transformations for CUDA Tile.
• You will develop MLIR-based dialects and lowering passes to optimize tile-based kernels.
• Collaborate across teams to define public APIs and ensure performance across GPU generations.

Job description

NVIDIA is hiring a Senior DL Compiler Engineer for the CUDA Tile team in Santa Clara, CA. You will design and implement compiler transformations, MLIR dialects, and lowering passes to optimize tile-based kernels across GPU generations.

Ideal candidates have 3+ years in compiler optimization, strong C/C++ skills, and the ability to lead projects in a dynamic, product-focused team. CUDA/MLIR/LLVM experience is a plus.