Senior Display Verification Engineer — Equity

NVIDIA; Santa Clara (CA); On-site; USD 168,000 - 310,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA has an opening for a Senior Verification Engineer on the Display Team. You will define testplans, build scalable UVM infrastructure, and verify display engines for GPUs and SoCs.

You will develop UVM testbenches, work with C/C++ testbenches, and drive verification coverage across global teams and partners. Ideal candidates bring 10+ years of verification experience, strong SystemVerilog/Python/C/C++ skills, and hands-on use of industry tools like VCS and Verdi.

Qualifications

• 10+ years of relevant experience in verification.
• Strong hands-on expertise in UVM, SystemVerilog, Verilog, Python, and C/C++.
• Experience with constrained-random stimulus, functional coverage, and assertions.

Responsibilities

• Define verification scope, develop and drive testplans, and build scalable UVM-based infrastructure.
• Develop UVM testbenches and checkers; work with C/C++-based testbenches and reference models.
• Collaborate with architects and external partners to ensure IP behavior across tool chains.
• Lead verification sign-off and drive metrics and coverage closure.

Skills

UVM

SystemVerilog

Python

C/C++

Verification

Education

BS/MS in Electrical Engineering, Computer Engineering, or Computer Science

Tools

VCS

Verdi

Debussy

GDB

Job description

NVIDIA has an opening for a Senior Verification Engineer on the Display Team. You will define testplans, build scalable UVM infrastructure, and verify display engines for GPUs and SoCs.

You will develop UVM testbenches, work with C/C++ testbenches, and drive verification coverage across global teams and partners. Ideal candidates bring 10+ years of verification experience, strong SystemVerilog/Python/C/C++ skills, and hands-on use of industry tools like VCS and Verdi.