Senior Digital Verification Engineer - Space ASICs

Medium; Saratoga (CA); On-site; USD 120,000 - 220,000; Full time

Job summary

E-Space is seeking Digital Design Verification Engineers to verify our custom ASICs for satellite and wireless telephony. You will write and run verification tests using Verilog, SystemVerilog and UVM in a high‑growth space environment.

Based in our Saratoga office, this full-time, exempt role offers a base pay range of $120,000–$220,000 annually, with compensation determined by experience and impact. A sponsorship note: we cannot sponsor visas for this location at this time.

Qualifications

• 4+ years of design verification experience in the semiconductor industry.
• Proficiency in Verilog and SystemVerilog with HDL verification methodologies.
• Experience writing verification tests within an existing environment.

Responsibilities

• Verify E-Space's custom ASICs for satellite and wireless telephony.
• Develop and execute verification tests using Verilog/SystemVerilog/UVM.
• Collaborate in a fast-paced, high-growth space environment.

Job description

E-Space is seeking Digital Design Verification Engineers to verify our custom ASICs for satellite and wireless telephony. You will write and run verification tests using Verilog, SystemVerilog and UVM in a high‑growth space environment.

Based in our Saratoga office, this full-time, exempt role offers a base pay range of $120,000–$220,000 annually, with compensation determined by experience and impact. A sponsorship note: we cannot sponsor visas for this location at this time.