Senior Digital IC Architect: High-Speed SerDes & Automotive

1010 Analog Devices Inc.

Beaverton (OR)

On-site

USD 157,000 - 227,000

Full time

14 days+
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Benefits offered by this job

Discretionary bonus
Medical insurance
Vision insurance
Dental coverage
401k plan
Paid vacation
Holidays
Sick time

Job summary

Analog Devices, Inc. in Beaverton, OR (or Colorado Springs, CO) seeks a Principal Engineer to lead the architecture and design of next-generation digital ICs for automotive OpenGMSL connectivity.

The role focuses on high-speed SerDes blocks, system-level design, and cross-functional collaboration across analog, digital, verification, and product teams. You will drive architecture decisions, write specifications, mentor engineers, and contribute to silicon bring-up and debug.

Qualifications

  • Master's degree in Electrical Engineering or equivalent with 7+ years of relevant experience or PhD with 4+ years of relevant experience.
  • Experience designing and verifying complex digital systems using Verilog/SystemVerilog.
  • Ability to architect and plan designs at the system level, translating concepts into robust implementations.
  • Clear and concise written and verbal communication skills, with team experience and proactive problem-solving.
  • Understanding of high-speed SerDes transceiver architectures and video/data transport.
  • Solid understanding of digital/analog trade-offs, timing analysis, power estimation, physical design, and DFT concepts.
  • Hands-on silicon bring-up and debug experience.
  • Proven track record designing, leading, and delivering products to market.

Responsibilities

  • Architect and design digital blocks and subsystems for high-speed SerDes ICs.
  • Drive evolution of OpenGMSL technology and standards.
  • Write detailed block and subsystem specifications.
  • Use Verilog and SystemVerilog to design digital blocks, subsystems, and top-level designs.
  • Develop block-level testbenches, verify block functionality, and ensure full-chip verification.
  • Perform linting, CDC analysis, and power analysis; assist with timing closure.
  • Collaborate across analog, digital, verification, test, and product definition teams.
  • Provide technical leadership for SerDes subsystems and products.
  • Support silicon bring-up, characterization, and debug activities.
  • Lead architecture, design and peer reviews.

Skills

Digital design
System architecture
Verilog/SystemVerilog
SerDes & communications
Lab & silicon debug
Timing analysis
Power estimation
Physical implementation
Leadership

Education

MSEE or equivalent
PhD in EE

Tools

Verilog
SystemVerilog

Job description

Analog Devices, Inc. in Beaverton, OR (or Colorado Springs, CO) seeks a Principal Engineer to lead the architecture and design of next-generation digital ICs for automotive OpenGMSL connectivity.

The role focuses on high-speed SerDes blocks, system-level design, and cross-functional collaboration across analog, digital, verification, and product teams. You will drive architecture decisions, write specifications, mentor engineers, and contribute to silicon bring-up and debug.

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