Senior Digital IC Architect - High-Speed SerDes & Video

Analog Devices; Colorado Springs (CO); On-site; USD 157,000 - 227,000; Full time

Job summary

Analog Devices, Inc. is seeking a Principal Engineer for Digital IC Design and Architecture. Lead architecture and design of high‑speed SerDes blocks, with focus on OpenGMSL technology for automotive and industrial applications. Beaverton OR or Colorado Springs CO based.

The role requires a Master’s in EE or PhD with extensive experience in Verilog/SystemVerilog, digital design, and system architecture. Strong leadership and cross‑functional collaboration are essential.

Qualifications

• Master's degree in Electrical Engineering or equivalent required or PhD with relevant experience.
• Experience designing and verifying complex digital systems using Verilog/SystemVerilog.
• Strong knowledge of SerDes standards and video/data transport.
• Proven track record leading teams and delivering products to market.
• Excellent written and verbal communication skills; proactive problem solver.

Responsibilities

• Architect and design digital blocks and SerDes subsystems for high‑speed ICs.
• Drive evolution of OpenGMSL technology and contribute to technical standards.
• Write detailed block and subsystem specifications for design and implementation.
• RTL design using Verilog/SystemVerilog for digital blocks and top‑level designs.
• Develop block-level testbenches, verify functionality, and enable full‑chip verification.
• Support mixed-signal integration and back‑end activities including timing closure.
• Collaborate across analog, digital, verification, test, and product teams.

Skills

Verilog/SystemVerilog

Digital Architecture & Design

System Architecture & Implementation

Leadership

Communication Skills

SerDes & Communications

Timing & Power Analysis

Lab & Silicon Debug

DSP & Signal Processing

Education

Master's degree in Electrical Engineering or equivalent

PhD in Electrical Engineering

Job description

Analog Devices, Inc. is seeking a Principal Engineer for Digital IC Design and Architecture. Lead architecture and design of high‑speed SerDes blocks, with focus on OpenGMSL technology for automotive and industrial applications. Beaverton OR or Colorado Springs CO based.

The role requires a Master’s in EE or PhD with extensive experience in Verilog/SystemVerilog, digital design, and system architecture. Strong leadership and cross‑functional collaboration are essential.