Senior Digital Design Engineer - NVLink Fusion RTL ASIC

NVIDIA; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity compensation

Benefits package

Job summary

NVIDIA in Santa Clara, CA, seeks a Senior Digital Design Engineer for its NVLink Fusion AI infrastructure SoC team. You will analyze architectural requirements, implement RTL blocks, and collaborate with architects, verification, and SoC integration engineers to deliver high-performance, power-efficient designs.

The role emphasizes delivering verified RTL, trade-off analysis, and IP integration. A bachelor's or master's in EE/CE with 5+ years of relevant ASIC experience and experience with

Qualifications

• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering, or equivalent experience.
• 5+ years of relevant work experience.
• Experience with high-speed connectivity protocols such as NVLink, PCIe, Ethernet, UCIE, etc.
• Proven track record delivering high-bandwidth datapath blocks and understanding ASIC design flows.

Responsibilities

• Analyze architectural requirements and perform trade-off analyses for RTL blocks.
• Craft micro-architecture specs and implement RTL, delivering verified, synthesis- and timing-clean blocks.
• Collaborate with chip architects, verification engineers, and SoC integration engineers to meet block goals on time.
• Identify potential IP solutions and assist in integrating and customizing them.

Skills

RTL design

ASIC design flows

analytical skills

team collaboration

Education

Bachelors or Masters in EE/CE

Job description

NVIDIA in Santa Clara, CA, seeks a Senior Digital Design Engineer for its NVLink Fusion AI infrastructure SoC team. You will analyze architectural requirements, implement RTL blocks, and collaborate with architects, verification, and SoC integration engineers to deliver high-performance, power-efficient designs.

The role emphasizes delivering verified RTL, trade-off analysis, and IP integration. A bachelor's or master's in EE/CE with 5+ years of relevant ASIC experience and experience with