Senior Digital Design Engineer — AI SoC (NVLink) Equity

NVIDIA Corporation; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity compensation

Comprehensive benefits

Job summary

NVIDIA Corporation is seeking a Senior Digital Design Engineer for its Semi-Custom Silicon products group in Santa Clara. You will craft and implement NVLink Fusion-based AI infrastructure system-on-chips, delivering high-performance RTL blocks and collaborating with architects and verification teams.

The role emphasizes strong analytical and interpersonal skills, with a focus on high-bandwidth datapath blocks and complex ASIC design flows.

Qualifications

• Bachelor's or Master's Degree in Electrical Engineering or Computer Engineering with 5+ years of relevant experience.
• Experience with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, UCIE, etc.
• Proven track record delivering high bandwidth datapath blocks (data movers, protocol adaptors, network-on-chip, arbiters, schedulers).
• Deep understanding of ASIC design flows and methodology.
• Strong analytical and interpersonal skills, team-oriented.

Responsibilities

• Analyze architectural requirements and perform trade-off analysis to deliver high performance, area- and power-efficient RTL blocks.
• Craft micro-architecture specifications, implement in RTL, and deliver fully verified blocks.
• Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration engineers to meet block goals.
• Identify potential IP solutions for specific use cases and assist in selecting and integrating IP.

Skills

RTL design

ASIC design flows

NVLink

PCIe

Ethernet

SoC integration

Data path blocks

Analytical skills

Interpersonal skills

Education

Electrical/Computer Eng degree

Tools

Verilog/SystemVerilog

EDA tools

Job description

NVIDIA Corporation is seeking a Senior Digital Design Engineer for its Semi-Custom Silicon products group in Santa Clara. You will craft and implement NVLink Fusion-based AI infrastructure system-on-chips, delivering high-performance RTL blocks and collaborating with architects and verification teams.

The role emphasizes strong analytical and interpersonal skills, with a focus on high-bandwidth datapath blocks and complex ASIC design flows.