Senior ASIC Design Engineer — AI-Driven Chip Design

NVIDIA Corporation

Santa Clara (CA)

On-site

USD 168,000 - 265,000

Full time

14 days+
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Job summary

NVIDIA Corporation in Santa Clara, CA, seeks ASIC Design Engineers with experience in agentic AI to design and implement world-leading SoCs and GPUs. Join the AI for chip design team and tap into AI's potential to transform chip design.

You will develop RTL in Verilog, verify designs, and build LLM-powered engineering assistants. This role blends research, engineering, and product development in a dynamic, globally distributed team. Equity and benefits are offered.

Qualifications

  • Master's or PhD in Electrical Engineering, Computer Science/Engineering, or a related field.
  • 8+ years of meaningful work experience.
  • Experience in micro-architecture and RTL development (Verilog).
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
  • Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.
  • Proficiency in rapid prototyping using Python with data structures, algorithms, and software engineering.
  • Experience with fine-tuning large language models and multi-agent systems.

Responsibilities

  • Document and deliver design guidelines to help the ASIC team meet targets.
  • Develop agentic AI solutions to craft micro-architecture, RTL, and fully verified designs.
  • Collaborate with designers and tool owners to ensure guidelines meet requirements.
  • Deploy LLM-powered solutions for engineering assistants and multi-modal dialogue systems.
  • Stay updated with advancing ML/AI to create powerful chip-design solutions.

Skills

ASIC design
RTL Verilog
Python programming
Data structures & algorithms
Large language models
Multi-agent systems
RAG pipelines
Communication
Problem solving

Education

Master's or PhD in Electrical Engineering / CS

Tools

Verilog tooling
Timing analysis tools
Synthesis tools
ASIC design flows

Job description

NVIDIA Corporation in Santa Clara, CA, seeks ASIC Design Engineers with experience in agentic AI to design and implement world-leading SoCs and GPUs. Join the AI for chip design team and tap into AI's potential to transform chip design.

You will develop RTL in Verilog, verify designs, and build LLM-powered engineering assistants. This role blends research, engineering, and product development in a dynamic, globally distributed team. Equity and benefits are offered.

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