Senior DFT Engineer (Remote) – IJTAG/Tessent

Encore Semi, Inc.; Austin (TX); Remote; USD 135,000 - 150,000; Full time

Benefits offered by this job

15 days PTO per year

10 paid holidays per year

Comprehensive medical benefits 80% of?

Dental & Vision 50% Premiums

Life Insurance & Disability

EAP

401k – Traditional & Roth

Tuition reimbursement

Job summary

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture for complex SoCs in a fully remote role in the United States. You will work with RTL teams to drive DFT from design to silicon bring-up, ensuring high fault coverage and robust test strategies.

The position offers a base salary of $135,000–$150,000 per year plus comprehensive benefits. Relocation not required; remote work across the USA is supported.

Qualifications

• 8+ years of proven ASIC DFT engineering experience.
• IEEE 1687 (IJTAG) architecture knowledge including ICL and PDL formats.
• Proficient with Mentor Tessent tool suite.

Responsibilities

• Architect, implement, and verify DFT structures (Scan, MBIST, Boundary Scan).
• Develop and integrate IJTAG networks across IP and SoC levels.
• Perform test insertion, ATPG generation, and fault coverage analysis.
• Run and debug gate-level simulations with zero-delay and timing annotations.

Skills

8+ years ASIC DFT

Verilog/SystemVerilog

Scripting Tcl/Python/Perl

Debug & verification

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Tessent

Xcelium

QuestaSim

VCS

Job description

Encore Semi, Inc. is seeking a Senior DFT Engineer to lead test architecture for complex SoCs in a fully remote role in the United States. You will work with RTL teams to drive DFT from design to silicon bring-up, ensuring high fault coverage and robust test strategies.

The position offers a base salary of $135,000–$150,000 per year plus comprehensive benefits. Relocation not required; remote work across the USA is supported.