Senior DFT Architect for SoCs - Tapeout to Production

Synopsys Inc

Austin (TX)

On-site

USD 180,000 - 240,000

Full time

7 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Synopsys seeks a hands-on DFT expert to lead test architecture for complex SoCs that tape out and go production. You will own end-to-end DFT deliverables, collaborating across RTL, verification, physical design, and timing to optimize testability, yield, and cost.

This role sits in the Systems Solutions Group and partners with customers to accelerate tapeouts. You will influence DFT strategies, drive signoff readiness, and mentor peers while delivering scalable methodologies across programs and

Qualifications

  • Strong understanding of scan/ATPG, memory BIST, logic BIST, and analog test considerations.
  • Experience tapeout and production DFT implementations.
  • Ability to own complex deliverables end-to-end and influence outcomes.
  • Comfortable leading technical discussions with architects and pushing back when issues arise.

Responsibilities

  • Own DFT architecture, implementation, integration, and verification for complex SoCs from specification to tapeout.
  • Define and execute test strategies across scan insertion, ATPG, memory/logic BIST, and analog test considerations.
  • Drive DFT signoff readiness by identifying risks early and closing RTL‑to‑GDS gaps.
  • Develop reusable DFT methodologies, checklists, and guidelines using Synopsys tools.
  • Collaborate with silicon validation and test teams on post-silicon debug and pattern refinement.
  • Partner with RTL, verification, physical design, timing, and power teams to integrate testability early.
  • Provide technical guidance through reviews, debugging support, and best-practice sharing.

Skills

DFT expertise
RTL/ SoC design understanding
Cross-functional collaboration
Analytical problem solving
Test architecture

Education

Bachelor's or Master's in Electrical Engineering

Tools

TetraMAX
DFT Compiler
BIST Architect

Job description

Synopsys seeks a hands-on DFT expert to lead test architecture for complex SoCs that tape out and go production. You will own end-to-end DFT deliverables, collaborating across RTL, verification, physical design, and timing to optimize testability, yield, and cost.

This role sits in the Systems Solutions Group and partners with customers to accelerate tapeouts. You will influence DFT strategies, drive signoff readiness, and mentor peers while delivering scalable methodologies across programs and

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Lead DFT Architect for SoCs | Tapeout Expert
Lead DFT Architect for SoCs | Tapeout Expert

Synopsys, Inc. • Austin (TX)

Hybrid
USD 180,000 - 240,000
Senior DFT Architect: Test Strategy & Bring-Up
Senior DFT Architect: Test Strategy & Bring-Up

TYLsemi • United States

Remote
USD 150,000 - 210,000
Senior Principal DFT Architect & Tape-out Lead
Senior Principal DFT Architect & Tape-out Lead

SiMa.ai • San Jose (CA)

On-site
USD 231,000 - 358,000
Senior DFT/DFM Logic Engineer – ASIC Tape-out Expert
Senior DFT/DFM Logic Engineer – ASIC Tape-out Expert

Intel Corporation • Phoenix (AZ)

Hybrid
USD 142,000 - 269,000
Stock bonuses
Health insurance
Retirement benefits
Senior DFT Architect for SoC & Chiplet IP
Senior DFT Architect for SoC & Chiplet IP

TYLsemi • San Jose (CA)

On-site
USD 238,000 - 286,000
DFT, Principal Engineer
DFT, Principal Engineer

Synopsys Inc • Austin (TX)

On-site
USD 180,000 - 240,000
Senior DFT Engineer: SoC/ASIC Test & Silicon Bring-up
Senior DFT Engineer: SoC/ASIC Test & Silicon Bring-up

TYLsemi • United States

Remote
USD 120,000 - 180,000
Senior DFT Engineer – SoC Test Architect & Post-Silicon Lead
Senior DFT Engineer – SoC Test Architect & Post-Silicon Lead

QFocus Technologies LLC • Sunnyvale (CA)

Hybrid
USD 140,000 - 200,000
DFT Engineer I – SoC Test & Debug
DFT Engineer I – SoC Test & Debug

Cadence Design Systems • Cary (NC)

On-site
USD 89,000 - 165,000
Paid vacation
401(k) plan
Employee stock purchase plan
+2
Senior DFT Engineer - SoC Test & Bring-Up
Senior DFT Engineer - SoC Test & Bring-Up

MetAntz • San Francisco (CA)

On-site
USD 140,000 - 190,000