Lead DFT Architect for SoCs | Tapeout Expert

Synopsys, Inc.; Austin (TX); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Synopsys, Inc. is seeking a senior DFT expert to own architecture, implementation, and verification for complex SoCs from specification through tapeout.

You will define strategies for scan, ATPG, and BIST, collaborating with design, verification, and test teams to ensure production-ready solutions. The role requires leading technical discussions, driving closure under schedule constraints, and delivering reusable DFT methodologies across programs.

Qualifications

• 10+ years of hands-on SoC DFT experience including scan/ATPG, memory BIST, logic BIST, and analog test considerations.
• Strong understanding of end-to-end SoC flow from microarchitecture through RTL, verification, synthesis, timing, physical implementation, and signoff.
• Proven track record owning DFT implementation for complex SoCs that tape out and go to production.

Responsibilities

• Own DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, coordinating with customer and internal teams.
• Define and execute test strategies across scan insertion, ATPG, memory BIST, logic BIST, and analog test considerations to meet coverage, quality, yield, and cost targets.
• Drive DFT signoff readiness by identifying testability risks early and ensuring RTL-to-GDS closure.
• Develop reusable DFT methodologies, checklists, and guidelines using Synopsys tools to solve customer problems on active projects.
• Partner with silicon validation and test engineering teams on post-silicon debug and failure analysis to refine production test programs.
• Collaborate with RTL, verification, physical design, timing, and power teams to ensure testability is designed in from architecture through signoff.
• Provide technical guidance to peers through reviews, integration/debug support, and best-practice sharing.

Skills

DFT

ATPG

MBIST/LBIST

analog test

cross-functional

RTL-to-GDS

Education

Bachelor's or Master's in Electronics/Electrical Engineering

Tools

TetraMAX

DFT Compiler

BIST Architect

Job description

Synopsys, Inc. is seeking a senior DFT expert to own architecture, implementation, and verification for complex SoCs from specification through tapeout.

You will define strategies for scan, ATPG, and BIST, collaborating with design, verification, and test teams to ensure production-ready solutions. The role requires leading technical discussions, driving closure under schedule constraints, and delivering reusable DFT methodologies across programs.