Senior Design Verification Lead (Hybrid)

Semtech; San Jose (CA); Híbrido; USD 116.000 - 216.000; Jornada completa

Descripción de la vacante

Semtech Corporation, a leader in analog and mixed-signal semiconductors, seeks a Design Verification Manager to lead a distributed verification team across multiple projects in a hybrid role (San Diego or San Jose). You will drive verification strategies, develop test plans, and mentor engineers while coordinating with system, firmware, and analog groups.

The role requires 10+ years in IC DV, deep SystemVerilog/UVM expertise, and strong leadership skills.

Formación

• 10+ years of industry experience in integrated circuit design verification (DV).
• Experience leading, mentoring or informally managing engineers or projects.
• Strong analytical, synthesis and problem-solving skills.
• In-depth knowledge of digital IC verification with MCU-based hardware systems (ARM, RISC-V, PIC, STM32) with memories, custom digital architecture, interfaces, and IPs.
• Proficiency in SystemVerilog and UVM; Verilog/VHDL; scripting (Python, Perl); debugging; and industry ESG/EDA tools.

Responsabilidades

• Lead, mentor and develop a team of verification engineers across multiple projects.
• Drive definition and implementation of verification strategies and test plans for digital/mixed-signal ICs.
• Develop testbenches using SystemVerilog and UVM; manage RTL and AMS verification.
• Improve verification scalability and portability; establish CI, regression tests, scoreboards and monitors.
• Interface with system, digital hardware, embedded firmware, analog, and cross-functional teams.
• Drive adoption of advanced verification methodologies and tool evaluation.
• Provide technical support to silicon labs, tests, and applications.

Conocimientos

SystemVerilog

UVM

Verilog/VHDL

Python

Perl

EDA tools

Leadership

ARM/RISC-V

Debugging

Scripting

Educación

B.S./M.S. in Electrical or Computer Engineering

Herramientas

Synopsys

Cadence

Siemens

Descripción del empleo

Semtech Corporation, a leader in analog and mixed-signal semiconductors, seeks a Design Verification Manager to lead a distributed verification team across multiple projects in a hybrid role (San Diego or San Jose). You will drive verification strategies, develop test plans, and mentor engineers while coordinating with system, firmware, and analog groups.

The role requires 10+ years in IC DV, deep SystemVerilog/UVM expertise, and strong leadership skills.