Lead Digital DV Engineer – Hybrid (San Diego)

Semtech; San Diego (CA); Hybrid; USD 130,000 - 200,000; Full time

Job summary

Semtech Corporation, located in San Diego (Hybrid), seeks a Sr. Design Verification Engineer to lead verification for digital IP blocks and full mixed-signal ICs in sensing products.

You will collaborate with system, digital, analog, firmware, and cross-functional teams while mentoring junior engineers and supporting silicon validation. The role emphasizes UVM-based verification, testbench development, coverage, and continuous improvement of verification infrastructure.

Qualifications

• 8+ years of industry experience in integrated circuit design verification (DV).
• Experience in digital IC verification for mixed-signal ICs with MCU-based hardware systems.
• Proficient in SystemVerilog with strong UVM implementation skills, Python scripting.

Responsibilities

• Define, develop and optimize verification plans and test strategies for digital IP blocks and full ICs.
• Design and implement UVM testbenches and constrained-random verification environments.
• Debug and resolve RTL/verification issues; drive regression and coverage tracking.
• Interface with cross-functional teams including analog, firmware and digital design.
• Mentor junior verification engineers and support silicon validation.

Skills

SystemVerilog & UVM

Python scripting

Analytical problem solving

Education

B.S. or M.S. in Electrical or Computer Engineering

Tools

Synopsys VCS

Cadence Xcelium

Siemens Questa

SpyGlass

JasperGold

Job description

Semtech Corporation, located in San Diego (Hybrid), seeks a Sr. Design Verification Engineer to lead verification for digital IP blocks and full mixed-signal ICs in sensing products.

You will collaborate with system, digital, analog, firmware, and cross-functional teams while mentoring junior engineers and supporting silicon validation. The role emphasizes UVM-based verification, testbench development, coverage, and continuous improvement of verification infrastructure.