Senior Design Verification Engineer — AI Hardware & SoCs

Acceler8 Talent; Mountain View (CA); Hybrid; USD 200,000 - 320,000; Full time

Job summary

Acceler8 Talent is seeking a Senior Design Verification Engineer in Mountain View, CA (onsite). The role focuses on owning verification for complex IP and subsystems, developing UVM testbenches, and driving coverage closure to ensure silicon success.

You will collaborate with design, architecture, and software teams, build scalable verification environments, and advance verification methodologies with automation and AI-assisted workflows.

Qualifications

• 5+ years of pre-silicon design verification experience.
• End-to-end ownership of verification for complex IP, subsystems, or SoCs.
• Strong UVM methodology and SystemVerilog experience.
• Experience developing verification environments, infrastructure, and reusable test frameworks.
• Proven track record debugging and achieving coverage closure.
• Experience collaborating across hardware and software teams in fast-paced development environments.
• A passion for improving verification methodologies through automation.

Responsibilities

• Own verification for complex IP, subsystems, or SoCs from planning through functional closure.
• Develop UVM testbenches, verification environments, and reusable verification infrastructure.
• Build verification strategies that scale from block-level to full-chip and emulation.
• Debug complex functional issues and drive coverage closure.
• Work closely with design, architecture, and software teams to ensure first-pass silicon success.
• Use AI-assisted verification workflows to improve productivity and speed up development.

Skills

Pre-silicon DV ownership

End-to-end ownership

Automation

Collaboration

Tools

UVM

SystemVerilog

Verification Environments

Emulation Platforms

Job description

Acceler8 Talent is seeking a Senior Design Verification Engineer in Mountain View, CA (onsite). The role focuses on owning verification for complex IP and subsystems, developing UVM testbenches, and driving coverage closure to ensure silicon success.

You will collaborate with design, architecture, and software teams, build scalable verification environments, and advance verification methodologies with automation and AI-assisted workflows.