Senior Design Verification Engineer - AI Accelerator

DensityAI; Mountain View (CA); On-site; USD 192,000 - 320,000; Full time

Job summary

DensityAI, based in Mountain View, CA, seeks an experienced Design Verification engineer to own end-to-end verification for complex IP/subsystems and SoCs, collaborating with HW and software teams to drive the AI accelerator program from first silicon through scale-out.

You will define testing strategy from IP to SOC-level, contribute to emulation flows, and leverage AI-assisted toolchains to accelerate timelines, with senior individual-contributor expectations and potential for equity-based

Qualifications

• 5+ years of experience in block-level/sub-system verification or SoC verification.
• Familiarity with UVM and testbench architectures.
• Ability to own end-to-end verification from plan to functional closure.
• Strong collaboration with HW and software teams.

Responsibilities

• Own an entire testing domain based on your expertise.
• Develop end to end testing strategy from IP to SOC-level and to emulation for our AI accelerator silicon.
• Use and develop AI-assisted tool flows to accelerate verification and emulation timeline.

Skills

UVM methodology

End-to-end verification

Testbench architecture

Pre-silicon verification

Collaboration

RISC-V

Formal verification

Emulation platforms

Tools

Palladium

Veloce

Job description

DensityAI, based in Mountain View, CA, seeks an experienced Design Verification engineer to own end-to-end verification for complex IP/subsystems and SoCs, collaborating with HW and software teams to drive the AI accelerator program from first silicon through scale-out.

You will define testing strategy from IP to SOC-level, contribute to emulation flows, and leverage AI-assisted toolchains to accelerate timelines, with senior individual-contributor expectations and potential for equity-based