Design Verification (DV) Engineer

DensityAI; Mountain View (CA); On-site; USD 192,000 - 320,000; Full time

Job summary

DensityAI, based in Mountain View, CA, seeks an experienced Design Verification engineer to own end-to-end verification for complex IP/subsystems and SoCs, collaborating with HW and software teams to drive the AI accelerator program from first silicon through scale-out.

You will define testing strategy from IP to SOC-level, contribute to emulation flows, and leverage AI-assisted toolchains to accelerate timelines, with senior individual-contributor expectations and potential for equity-based

Qualifications

• 5+ years of experience in block-level/sub-system verification or SoC verification.
• Familiarity with UVM and testbench architectures.
• Ability to own end-to-end verification from plan to functional closure.
• Strong collaboration with HW and software teams.

Responsibilities

• Own an entire testing domain based on your expertise.
• Develop end to end testing strategy from IP to SOC-level and to emulation for our AI accelerator silicon.
• Use and develop AI-assisted tool flows to accelerate verification and emulation timeline.

Skills

UVM methodology

End-to-end verification

Testbench architecture

Pre-silicon verification

Collaboration

RISC-V

Formal verification

Emulation platforms

Tools

Palladium

Veloce

Job description

About The Role

We're looking for a experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level verification from plan to functional closure. This is a senior individual-contributor role and you'll partner closely with our HW-design and software teams, driving DensityAI's AI accelerator program from first silicon through scale-out.

What you'll do

• Own an entire testing domain based on your expertise
• Develop end to end testing strategy from IP to SOC-level and to emulation for our AI accelerator silicon
• Use and develop AI-assisted tool flows to accelerate verification and emulation timeline

What we're looking for

• 5+ years of experience in one or more of the following:
  • Block Level/Sub System Verification
  • CPU Subsystem/IP integration
  • SoC/full-chip Verification
  • Emulation testing
  • DMA/NoC Verification
  • Multi-SoC/Die to Die protocol verification
• Debug for functional closure of complex design or SOCs
• Proven records on end-to-end pre-silicon verification ownership and deliverables
• Strong Interest in optimizing Verification techniques and life cycle using the latest agentic/AI assisted flows
• Exceptional abilities in analyzing and understanding specification from both hardware and software perspectives
• Well-versed in UVM methodology and testbench architecture
• Ability to define clear goals and milestones to meet aggressive timelines and quickly adapt to a dynamic design life cycle
• Self driven and passionate, with a strong sense of respectful team collaboration
• Flexible Mindset to jump in and contribute to multiple domains within verification as needed
• (Optional) RISC-V, formal verification, emulation platforms (Palladium, Veloce, or equivalent), or post-silicon bring-up

Compensation

Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.

California pay range: $200,000 USD - $320,000 USD

Visa Sponsorship

DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.

Export Controls

Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.

Equal Opportunity

DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.