Senior ASIC Verification Engineer

Insight Global; North Reading (MA); On-site; USD 140,000 - 190,000; Full time

Job summary

Insight Global in North Reading, MA is seeking a Sr. ASIC Verification Engineer to support a leading semiconductor organization. You will join the ASIC Reference Model team to develop high-level functional models used to verify complex ASIC and SoC designs.

The ideal candidate has strong SystemC, C++, SystemVerilog, and UVM expertise, with a deep understanding of digital architecture, enabling you to model system behavior, collaborate with RTL designers, and lead global verification efforts.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field.
• 8+ years of ASIC/SoC verification experience in semiconductor product development.
• Strong experience with object oriented programming (SystemC or C++).
• Strong experience developing verification environments using SystemVerilog and UVM.

Responsibilities

• Develop high-level functional models used to verify complex ASIC/SoC designs.
• Collaborate with architects and RTL designers to model expected system behavior.
• Provide technical leadership for verification efforts across global teams.

Skills

SystemC

C++

SystemVerilog

UVM

Object oriented programming

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field

Job description

• - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field
• - preferred.
• - 8+ years of ASIC/SoC verification experience in semiconductor product development.
• - Strong experience with object oriented programming (SystemC or C++)
• - Strong experience developing verification environments using SystemVerilog and UVM.

Job Description

Insight Global is seeking a Sr. ASIC Verification Engineer to support a leading semiconductor organization in North Reading, MA. This engineer will join the ASIC Reference Model team and play a critical role in developing high-level functional models used to verify complex ASIC and SoC designs. The ideal candidate will combine strong SystemC, C++, and SystemVerilog expertise with a deep understanding of digital architecture, enabling them to model expected system behavior, collaborate with architects and RTL designers, and drive resolution of complex functional issues. This role is highly focused on system-level thinking, reference model development, high-level debug, and technical leadership of global verification efforts.