Overview
We have been retained by a handful of companies working on cutting-edge solutions across AI, IoT, and HPC.
Responsibilities / Requirements
- Senior Verification Engineer with 10+ years of experience
- Strong experience in VLSI verification
- Proficiency in UVM and SystemVerilog
- Hands-on experience across at least two full block or system verification cycles
Nice to have
- Experience working within a startup environment
- Strong individual contributors who can collaborate with cross-functional teams
- Experience with chip tape-out
- Compelling equity options
Important note
Please note: this role requires over 10 years of industry experience and is not suitable for entry-level candidates.
These roles are all based in Austin, full-time, and with well-backed startups.