Senior Design for Test Engineer - DFT & ATPG Lead

Arrow Electronics, Inc.; San Jose (CA); Vor Ort; USD 112.000 - 171.000; Vollzeit

Zusammenfassung

Arrow Electronics, Inc. seeks a Design For Test Engineer IV to lead DFT activities, including scan insertion, JTAG, ATPG DRC, and timing analysis.

You will ensure delivery of DFT deliverables and troubleshoot simulation failures while collaborating with design teams across sites. With 8+ years of related experience and a 4-year degree (or equivalent), you will drive best practices, explore new technologies, and tailor DFT solutions to client requirements, supporting the engineering services

Qualifikationen

• Typically requires a minimum of 8 years of related experience with a 4 year degree; or 6 years and an advanced degree; or equivalent experience.

Aufgaben

• Inserts scan, JTAG, ATPG DRC and coverage analysis; simulate with timing/SDF.
• Ensure successful delivery of DFT deliverables to customers.
• Debug simulation failures and root cause analysis.
• Collaborate with design teams across sites to define and implement.
• Share best practices of DFT; adopt new technology, tools, and methodologies.
• Engage with clients and technical teams to align concurrent objectives.
• Explore new technology usage to achieve targets.
• Map business requirements to customized DFT solutions with strong analytical skills.

Jobbeschreibung

Arrow Electronics, Inc. seeks a Design For Test Engineer IV to lead DFT activities, including scan insertion, JTAG, ATPG DRC, and timing analysis.

You will ensure delivery of DFT deliverables and troubleshoot simulation failures while collaborating with design teams across sites. With 8+ years of related experience and a 4-year degree (or equivalent), you will drive best practices, explore new technologies, and tailor DFT solutions to client requirements, supporting the engineering services