Senior Design Engineering Architect Systems & Interfaces

Cadence; San Jose (CA); Presencial; USD 186.000 - 345.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Paid vacation

Paid holidays

401(k) matching

Employee stock purchase plan

Medical, dental, vision insurance

Descripción de la vacante

Cadence seeks an experienced Design Engineering Architect for the SSG role in San Jose. You will lead integration of Cadence IP into customer SoCs, develop reference designs and training, and guide complex pre-sales and post-sales engagements.

You will work with Sales, Marketing, Development, and Support to resolve issues, drive product adoption, and define documentation and collateral. Occasional international travel is required.

Formación

• Experience with RTL design, verification and debugging high-speed interfaces (PCIe/UCIe/Ethernet).
• IP integration into complex SoCs with understanding of system architecture and interfaces.
• Proficient with AMBA protocols: ACE, CHI, AXI, APB.
• RTL coding and debugging in Verilog/SystemVerilog.
• End-to-end SoC flows: synthesis, constraints, DFT, CDC, timing analysis.
• Strong problem-solving and cross-functional collaboration.
• BS/MS with 8–12+ years in EE/CS and travel availability.

Responsabilidades

• Serve as the technical authority for Cadence interface controllers and system-level IP integration.
• Lead resolutions of critical customer issues and escalations with cross-functional teams.
• Develop reference designs, technical collateral and application notes for IP integration and SoC design.
• Develop and deliver training for customers and field application engineers.
• Provide advanced technical guidance on IP integration, configuration and deployment.
• Lead product evaluations and release-readiness reviews, identifying risks and usability gaps.
• Analyze customer needs to propose product and documentation improvements.

Conocimientos

RTL design & verification

IP integration into SoCs

AMBA protocols (ACE/CHI/AXI/APB)

Verilog/SystemVerilog

End-to-end SoC flows (synthesis, DFT,

Cross-functional leadership

Effective communication

Travel readiness (up to 10%)

Educación

BS in EE/CS with 12+ years

MS in EE/CS with 8+ years

Descripción del empleo

Cadence seeks an experienced Design Engineering Architect for the SSG role in San Jose. You will lead integration of Cadence IP into customer SoCs, develop reference designs and training, and guide complex pre-sales and post-sales engagements.

You will work with Sales, Marketing, Development, and Support to resolve issues, drive product adoption, and define documentation and collateral. Occasional international travel is required.