Senior CUDA Tile Compiler Engineer - MLIR & Performance

Socket.dev; Santa Clara (UT); On-site; USD 152,000 - 242,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is hiring software engineers for the CUDA Tile team. You will design and implement compiler transformations, develop MLIR-based dialects and lowering passes, and optimize tile-based kernels for performance across multiple GPU generations.

You will work on defining public APIs and advancing compiler techniques, with emphasis on performance, scalability, and reliability in a fast-paced, innovative environment.

Qualifications

• Bachelor, Master or Ph.D. in Computer Science, Computer Engineering or related field (or equivalent experience).
• 3+ years of compiler optimization, performance analysis and IR design experience.
• Ability to work independently, define project goals and scope, and lead development.
• Excellent C/C++ programming, debugging, performance analysis and test design.
• Strong interpersonal skills for a dynamic product-oriented team.

Responsibilities

• Design and implement compiler transformations for CUDA Tile.
• Develop MLIR-based dialects and lowering passes.
• Optimize performance of tile-based kernels across NVIDIA GPU generations.
• Define public APIs and craft compiler/optimization techniques.

Skills

C/C++ programming

Independent work

Team collaboration

Performance analysis

IR design

Education

Advanced degree in CS/CE

Tools

MLIR

LLVM

XLA

TVM

Job description

NVIDIA is hiring software engineers for the CUDA Tile team. You will design and implement compiler transformations, develop MLIR-based dialects and lowering passes, and optimize tile-based kernels for performance across multiple GPU generations.

You will work on defining public APIs and advancing compiler techniques, with emphasis on performance, scalability, and reliability in a fast-paced, innovative environment.