Design Verification Engineer- CPU

Velaura; Santa Clara (CA); On-site; USD 200,000 - 350,000; Full time

Benefits offered by this job

Equity participation

Competitive base salary

Performance incentives

Job summary

Velaura in Santa Clara, California, is seeking a Design Verification Engineer to verify its next-generation Physical AI SoC focused on a custom CPU. You will collaborate with architects, RTL, software and system teams to ensure correctness, performance, reliability and safety across RTL blocks and complete hardware/software systems running real workloads.

You will own a functional verification domain from test plan through coverage closure, building portable environments using SystemVerilog,

Qualifications

• 8+ years verifying high performance CPUs or complex digital designs.
• Strong computer architecture and microarchitecture fundamentals.
• Experience with SystemVerilog, UVM, C and C++, assertions and coverage driven verification.
• Experience owning a block or unit of a design independently from test plan through coverage closure.
• Experience writing test plans, portable testbenches and transactors.
• Experience debugging complex issues across hardware and software boundaries.
• BS or higher in Computer Engineering, Electrical Engineering or Computer Science.
• Ability to work effectively in a collaborative multidisciplinary engineering environment.

Responsibilities

• Own verification of custom CPU units including instruction fetch, decode, load store, and the instruction, data and last level caches.
• Work with CPU and SoC architects to understand the intent behind a newly designed microarchitecture and turn it into detailed test and coverage plans.
• Build verification environments using SystemVerilog, UVM, C and C++, with stimulus, checkers, assertions, trackers and coverage that stay portable across block and subsystem environments.
• Develop instruction level stimulus and compare against a golden instruction set simulator.
• Verify memory ordering, coherence, exceptions and privilege behavior against the architecture specification.
• Verify latency, bandwidth and cache behavior against high performance targets under representative workloads.
• Execute regressions through design and environment bring up, and track progress using bug and coverage metrics.
• Support emulation, FPGA prototyping and pre silicon software bring up, and drive root cause analysis across hardware and software boundaries.

Skills

SystemVerilog

UVM

C/C++

Test plans

Assertions

Coverage-driven verification

Debugging HW/SW

Computer architecture

Microarchitecture fundamentals

Education

BS or higher in Computer Engineering, Electrical Engineering or Computer Science

Job description

Role Overview

We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.

This role focuses on our custom CPU. We are designing a leading edge, high performance processor from scratch, and you will own a functional domain of its verification from test plan through coverage closure, proving that a newly designed microarchitecture behaves as intended.

Responsibilities

• Own verification of custom CPU units including instruction fetch, decode, load store, and the instruction, data and last level caches.


• Work with CPU and SoC architects to understand the intent behind a newly designed microarchitecture and turn it into detailed test and coverage plans.


• Build verification environments using SystemVerilog, UVM, C and C++, with stimulus, checkers, assertions, trackers and coverage that stay portable across block and subsystem environments.


• Develop instruction level stimulus and compare against a golden instruction set simulator.


• Verify memory ordering, coherence, exceptions and privilege behavior against the architecture specification.


• Verify latency, bandwidth and cache behavior against high performance targets under representative workloads.


• Execute regressions through design and environment bring up, and track progress using bug and coverage metrics.


• Support emulation, FPGA prototyping and pre silicon software bring up, and drive root cause analysis across hardware and software boundaries.

Required Qualifications

• 8 or more years verifying high performance CPUs or complex digital designs.


• Strong computer architecture and microarchitecture fundamentals.


• Experience with SystemVerilog, UVM, C and C++, assertions and coverage driven verification.


• Experience owning a block or unit of a design independently from test plan through coverage closure.


• Experience writing test plans, portable testbenches and transactors.


• Experience debugging complex issues across hardware and software boundaries.


• BS or higher in Computer Engineering, Electrical Engineering or Computer Science.


• Ability to work effectively in a collaborative multidisciplinary engineering environment.

Preferred Qualifications

• Knowledge of the ARM or RISC-V instruction set architecture.


• Knowledge of microprocessor verification domains such as cache coherence, memory ordering, prefetching, branch prediction, speculative execution and address translation.


• Prior experience verifying front end, fetch, load store, instruction cache, data cache or last level cache units.


• Knowledge of vector units or matrix multiplication units.


• Experience with random instruction sequencing, formal verification, gate level simulation or silicon bring up.


• Experience verifying a custom processor developed from scratch rather than an integrated third party core.


• Experience leading a small team of verification engineers.


• Experience using AI assisted verification workflows to improve productivity and coverage.

$200,000 - $350,000 a year

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensationfor this role includes a competitive base salary, performance-based incentives, andequity participation, allowing team members to share in the company’s long-termsuccess.

Your base pay will depend on your skills, qualifications, experience, and location.

In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

Why Velaura?

Velaura is building next-generation compute technology for cloud, edge, and PhysicalAI. Our solutions will enable robots, autonomous systems, drones, and other intelligentmachines to operate efficiently in the physical world.
This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape thefuture of Physical AI, we would love to hear from you.

Equal Employment Opportunity and Accommodations

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity.Qualified applicants will receive consideration for employment without regard to race,color, religion, national origin, gender, sexual orientation, gender identity, disability orprotected veteran status. We also take affirmative action to offer employment
opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mentaldisabilities. Applicants who would like to contact us regarding the accessibility of ourwebsite or who need special assistance or a reasonable accommodation for any part ofthe application or hiring process may contact us at: [e-mail]. This contact
information is for accommodation requests only. Evaluation of requests for reasonableaccommodation will be determined on a case-by-case basis.