Senior CPU RTL Engineer — High-Performance Microarchitecture

MaC VC; San Diego (CA); Vor Ort; USD 176.000 - 263.000; Vollzeit

Zusammenfassung

Qualcomm Technologies, Inc. in San Diego is seeking a senior CPU RTL engineer to collaborate with chip architects on micro-architecture and architecture/product definition for high-performance, low-power devices.

The role emphasizes Verilog/VHDL, CPU RTL experience, microarchitecture specialization, power management, timing, and interaction with software, firmware, and platform teams to deliver optimized CPU features and reliable RTL implementations.

Qualifikationen

• MS degree with 5+ years CPU RTL or similar experience.
• Thorough knowledge of microprocessor architecture and related areas.
• Knowledge of Verilog and/or VHDL with experience using simulators.
• Strong understanding of timing, power, and design for testability.
• Excellent problem-solving and collaboration skills.

Aufgaben

• Performance exploration with CPU modeling team.
• Microarchitecture development and specification from concept to detailed spec.
• RTL ownership to meet power, performance, area, timing goals.
• Functional verification support with the verification team.
• Performance verification to ensure RTL meets goals.
• Design delivery with multi-functional teams across timing, area, reliability, testability, and power.
• Collaborate with Software, Firmware and platform teams to enable CPU features.

Kenntnisse

CPU RTL

Verilog/VHDL

Microarchitecture knowledge

Power management architectures

Scripting (Python/Perl)

Debug/Waveform tools

Ausbildung

MS degree in Computer/Electrical Engineering

PhD in related field

Tools

Verilog simulators

Waveform debugging tools

Jobbeschreibung

Qualcomm Technologies, Inc. in San Diego is seeking a senior CPU RTL engineer to collaborate with chip architects on micro-architecture and architecture/product definition for high-performance, low-power devices.

The role emphasizes Verilog/VHDL, CPU RTL experience, microarchitecture specialization, power management, timing, and interaction with software, firmware, and platform teams to deliver optimized CPU features and reliable RTL implementations.