Low-Power CPU RTL Design Engineer

QUALCOMM, Inc.; Santa Clara (CA); Sur place; USD 124 000 - 187 000; Plein temps

Résumé du poste

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking engineers for CPU RTL development focused on high performance and power efficiency. You will work with chip architects to conceive micro-architecture and contribute early to architecture/product definitions.

The role emphasizes power architecture, UPF power intent, RTL ownership, and delivering designs from RTL to physical implementation with strong emphasis on verification and low-power techniques.

Qualifications

• MS degree in Computer or Electrical Engineering or BS degree in Computer or Electrical Engineering with +3 years of RTL experience.
• Knowledge of Verilog and/or System Verilog. Experience with simulators and waveform debugging tools.
• Knowledge of power intent and UPF format. Experience using UPF and Conformal Low Power analysis.
• Knowledge of logic design principles along with timing and power implications.

Responsabilités

• Power Architecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
• Power Intent design in UPF along with RTL ownership. Development, assessment and refinement of UPF and RTL design to match the power intent to the RTL design.
• Design delivery. Work with multi-functional engineering team to implement and validate Power Aware design from RTL to Physical implementation.

Connaissances

Verilog/SystemVerilog

Simulation tools

UPF

Conformal Low Power

RTL design principles

Power/Timing analysis

Formation

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science

Outils

Perl

Python

Description du poste

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking engineers for CPU RTL development focused on high performance and power efficiency. You will work with chip architects to conceive micro-architecture and contribute early to architecture/product definitions.

The role emphasizes power architecture, UPF power intent, RTL ownership, and delivering designs from RTL to physical implementation with strong emphasis on verification and low-power techniques.