Senior CPU RTL Design Engineer - Power & Performance

Intel Corporation; Phoenix (AZ); Hybrid; USD 142,000 - 269,000; Full time

Benefits offered by this job

Competitive pay and benefits

Job summary

Intel in the United States (Austin, TX and Phoenix, AZ) seeks a CPU Logic Design Engineer to design and optimize RTL for Intel's processors, drive RTL code and simulations, and develop IP blocks for full-chip integration.

The role emphasizes architecture/microarchitecture features, power-aware design, and collaboration with SoC teams to deliver high performance and efficient CPUs, with a hybrid work model.

Qualifications

• Bachelor's degree in electrical engineering, computer engineering, or computer science with 5+ years of relevant experience.
• Master's degree in the same field with 3+ years of experience.
• 5+ years experience in CPU RTL design using SystemVerilog, with strong knowledge of logic design, simulation, and debug.
• 3+ years experience with modern energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization.
• 3+ years experience in Cross-clock domain crossings and power aware design.
• 3+ years experience in scripting languages such as TCL, Perl, or Python.

Responsibilities

• Develop and optimize RTL coding for the CPU.
• Participate in defining the architecture and microarchitecture features of the CPU design.
• Write RTL and optimize logic for power, performance, area, and timing goals.
• Ensure design integrity for physical implementation through effective strategies, tools, and methods.
• Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
• Document microarchitectural specifications (MAS) for the CPU features.
• Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.

Skills

CPU RTL design

SystemVerilog

Power-aware design

Scripting TCL/Perl/Python

Cross-clock domain crossings

Education

Bachelor's degree in EE/CE/CS

Master's degree in EE/CE/CS

Tools

Static timing analysis

UPF

Lint checks

Job description

Intel in the United States (Austin, TX and Phoenix, AZ) seeks a CPU Logic Design Engineer to design and optimize RTL for Intel's processors, drive RTL code and simulations, and develop IP blocks for full-chip integration.

The role emphasizes architecture/microarchitecture features, power-aware design, and collaboration with SoC teams to deliver high performance and efficient CPUs, with a hybrid work model.