Senior CPU Physical Design Engineer: PPA & RTL Feedback

NUVACORE, Inc.; Austin, Northern (TX, KY); Hybrid; USD 140,000 - 200,000; Full time

Job summary

NUVACORE, Inc. is seeking a seasoned CPU Physical Design Engineer to drive RTL feasibility, timing closure, and power optimization across CPU units. You will own RTL intake, enforce design readiness, and collaborate with CAD, RTL, and performance modeling teams to ensure successful tape-outs.

The role requires strong expertise in CPU micro-architecture, RTL synthesis/floor planning, and end-to-end PD sign-off. Excellent communication and initiative are a must.

Qualifications

• BS or MS in a relevant field with 12+ years experience (Lead) or 5+ years experience in CPU PD.
• Strong CPU micro-architecture concepts and design principles.
• Experience in CPU RTL feasibility, including RTL synthesis and floor planning.
• Deep expertise in timing analysis and timing ECO.
• Proficiency with Synopsys or Cadence EDA tools for PD in CPU design context.
• Demonstrated history of successful production tape-outs.
• Track record of driving PPA optimization for CPU units through RTL feedback and cross-functional collaboration.
• Comprehensive understanding of end-to-end physical design closure across all sign off domains.
• Strong communication skills with the ability to build processes and infrastructure from the ground up

Responsibilities

• Lead RTL/micro-architecture feasibility studies, providing actionable feedback to design teams.
• Drive PPA outcomes for CPU units with a focus on timing closure and power optimization.
• Collaborate cross-functionally with CPU unit owners, custom circuit designers, CAD, RTL/micro-architecture, and performance modeling teams.
• Own the RTL intake process for the PD team, enforcing quality standards and ensuring design readiness before RTL handoff.

Skills

CPU micro-architecture

RTL feasibility

Timing analysis

PPA optimization

Cross-functional collaboration

End-to-end physical design

Communication skills

Education

BS or MS in EE/CS

Tools

Synopsys EDA

Cadence EDA

Job description

NUVACORE, Inc. is seeking a seasoned CPU Physical Design Engineer to drive RTL feasibility, timing closure, and power optimization across CPU units. You will own RTL intake, enforce design readiness, and collaborate with CAD, RTL, and performance modeling teams to ensure successful tape-outs.

The role requires strong expertise in CPU micro-architecture, RTL synthesis/floor planning, and end-to-end PD sign-off. Excellent communication and initiative are a must.